KR100628249B1 - 반도체 소자의 형성 방법 - Google Patents
반도체 소자의 형성 방법 Download PDFInfo
- Publication number
- KR100628249B1 KR100628249B1 KR1020050085162A KR20050085162A KR100628249B1 KR 100628249 B1 KR100628249 B1 KR 100628249B1 KR 1020050085162 A KR1020050085162 A KR 1020050085162A KR 20050085162 A KR20050085162 A KR 20050085162A KR 100628249 B1 KR100628249 B1 KR 100628249B1
- Authority
- KR
- South Korea
- Prior art keywords
- pattern
- forming
- lower anti
- film
- reflection
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 28
- 239000004065 semiconductor Substances 0.000 title abstract description 15
- 238000004519 manufacturing process Methods 0.000 title abstract description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 36
- 238000005530 etching Methods 0.000 claims abstract description 11
- 125000006850 spacer group Chemical group 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 230000007261 regionalization Effects 0.000 claims abstract description 4
- 230000008569 process Effects 0.000 claims description 16
- 238000000576 coating method Methods 0.000 claims description 13
- 239000011248 coating agent Substances 0.000 claims description 11
- 238000010304 firing Methods 0.000 claims description 6
- 239000002904 solvent Substances 0.000 claims description 4
- 238000004528 spin coating Methods 0.000 claims description 4
- 230000003667 anti-reflective effect Effects 0.000 abstract description 8
- 239000006117 anti-reflective coating Substances 0.000 abstract description 7
- 239000000463 material Substances 0.000 description 21
- 230000000694 effects Effects 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 230000008859 change Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
Images
Classifications
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/091—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
- G03F7/168—Finishing the coated layer, e.g. drying, baking, soaking
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/38—Treatment before imagewise removal, e.g. prebaking
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
Abstract
Description
Claims (4)
- 기판 전면에 패턴 형성층을 형성하는 단계;상기 패턴 형성층 상부에 둘 이상의 하부 반사 방지막을 형성하는 단계;상기 하부 반사 방지막 상부 소정 영역에 감광막 패턴을 형성하는 단계;상기 감광막 패턴을 마스크로 하여 상기 하부 반사 방지막을 식각하는 단계;상기 감광막 패턴 측부에 측벽 스페이서를 형성하는 단계; 및상기 측벽 스페이서 및 감광막 패턴을 마스크로 하여 상기 패턴 형성층을 식각하는 단계를 포함하여 이루어짐을 특징으로 하는 반도체 소자의 제조 방법.
- 제 1항에 있어서,상기 둘 이상의 하부 반사 방지막은, 각각 하부에서부터 차례로, 코팅 후 소성 공정을 진행하여 이루어져 형성됨을 특징으로 하는 반도체 소자의 제조 방법.
- 제 1항에 있어서,상기 둘 이상의 하부 반사 방지막은 각각 100nm 이하의 두께로 형성되는 것을 특징으로 하는 반도체 소자의 제조 방법.
- 제 1항에 있어서,상기 하부 반사 방지막 각각은 용매(solvent)에 녹아 있는 상태로, 스핀 코 팅되어 형성되는 것을 특징으로 하는 반도체 소자의 제조 방법.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050085162A KR100628249B1 (ko) | 2005-09-13 | 2005-09-13 | 반도체 소자의 형성 방법 |
US11/320,624 US7625822B2 (en) | 2005-09-13 | 2005-12-30 | Semiconductor device and method for manufacturing the same including two antireflective coating films |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050085162A KR100628249B1 (ko) | 2005-09-13 | 2005-09-13 | 반도체 소자의 형성 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR100628249B1 true KR100628249B1 (ko) | 2006-09-27 |
Family
ID=37628784
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020050085162A KR100628249B1 (ko) | 2005-09-13 | 2005-09-13 | 반도체 소자의 형성 방법 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7625822B2 (ko) |
KR (1) | KR100628249B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101017771B1 (ko) * | 2007-12-31 | 2011-02-28 | 주식회사 하이닉스반도체 | 수직 트랜지스터를 구비한 반도체 소자의 제조 방법 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100685903B1 (ko) * | 2005-08-31 | 2007-02-26 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
KR100720481B1 (ko) * | 2005-11-28 | 2007-05-22 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
KR100824633B1 (ko) * | 2006-09-06 | 2008-04-24 | 동부일렉트로닉스 주식회사 | 플래시 메모리 소자 및 그 제조 방법 |
CN102007570B (zh) * | 2007-12-21 | 2013-04-03 | 朗姆研究公司 | 用高蚀刻速率抗蚀剂掩膜进行蚀刻 |
JP5121549B2 (ja) * | 2008-04-21 | 2013-01-16 | 株式会社東芝 | ナノインプリント方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001230258A (ja) | 2000-02-17 | 2001-08-24 | Nec Corp | 半導体装置の製造方法 |
JP2002124518A (ja) | 1997-07-02 | 2002-04-26 | Yamaha Corp | 配線形成法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6423474B1 (en) * | 2000-03-21 | 2002-07-23 | Micron Technology, Inc. | Use of DARC and BARC in flash memory processing |
US6630397B1 (en) * | 2002-12-10 | 2003-10-07 | Promos Technologies | Method to improve surface uniformity of a layer of arc used for the creation of contact plugs |
US6780708B1 (en) * | 2003-03-05 | 2004-08-24 | Advanced Micro Devices, Inc. | Method of forming core and periphery gates including two critical masking steps to form a hard mask in a core region that includes a critical dimension less than achievable at a resolution limit of lithography |
KR100598038B1 (ko) * | 2004-02-25 | 2006-07-07 | 삼성전자주식회사 | 다층 반사 방지막을 포함하는 고체 촬상 소자 및 그 다층반사 방지막의 제조 방법 |
US7429536B2 (en) * | 2005-05-23 | 2008-09-30 | Micron Technology, Inc. | Methods for forming arrays of small, closely spaced features |
KR100685903B1 (ko) * | 2005-08-31 | 2007-02-26 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
US7888269B2 (en) * | 2005-10-24 | 2011-02-15 | Spansion Llc | Triple layer anti-reflective hard mask |
KR100720481B1 (ko) * | 2005-11-28 | 2007-05-22 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
-
2005
- 2005-09-13 KR KR1020050085162A patent/KR100628249B1/ko active IP Right Grant
- 2005-12-30 US US11/320,624 patent/US7625822B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002124518A (ja) | 1997-07-02 | 2002-04-26 | Yamaha Corp | 配線形成法 |
JP2001230258A (ja) | 2000-02-17 | 2001-08-24 | Nec Corp | 半導体装置の製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101017771B1 (ko) * | 2007-12-31 | 2011-02-28 | 주식회사 하이닉스반도체 | 수직 트랜지스터를 구비한 반도체 소자의 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
US20070059937A1 (en) | 2007-03-15 |
US7625822B2 (en) | 2009-12-01 |
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