KR100599616B1 - Driving method of plasma display panel and plasma display device - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel and a plasma display device. In particular, in the driving method of the plasma display panel, the first voltage and the second voltage are respectively applied to the scan electrode and the address electrode of the discharge cell to be selected in the address period of the first subfield having the lowest weight among the plurality of subfields. Is authorized. In this case, the address electrode is floated after applying the second voltage to the address electrode.

In this manner, wall charges accumulate and at the same time, strong discharge quenching occurs in the discharge space, and discharge in the discharge space is eliminated, thereby reducing the voltage of the address electrode. Therefore, address discharge can be minimized and less address light can be generated than before.

Plasma Display Panel, Minimum Unit Light, Low Gradation, Subfield, Floating

Description

Plasma display panel driving method and plasma display device {DRIVING METHOD OF PLASMA DISPLAY PANEL AND PLASMA DISPLAY DEVICE}

1 is a partial perspective view of a typical plasma display panel.

2 is an electrode array diagram of a general plasma display panel.

3 is a view showing the amount of light emitted from a driving waveform and a subfield of a conventional plasma display panel.

4 is a diagram illustrating a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 5 is a diagram showing a driving waveform of the plasma display panel and the amount of light emitted in each subfield according to the first embodiment of the present invention.

FIG. 6 is a diagram showing driving waveforms and amounts of light emitted in each subfield of the plasma display panel according to the second exemplary embodiment of the present invention.

FIG. 7 is a view showing driving waveforms and amount of light emitted in each subfield of the plasma display panel according to the third exemplary embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP), and more particularly, to a plasma display panel driving method and a plasma display apparatus capable of maximizing low gray scale expression.

Recently, PDPs have been in the spotlight as flat panel display devices due to their high brightness, high luminous efficiency, and wide viewing angles, compared to other display devices.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. First, the structure of the plasma display panel will be described with reference to FIGS. 1 and 2.

1 is a partial perspective view of a plasma display panel, and FIG. 2 shows an electrode arrangement diagram of the plasma display panel.

As shown in FIG. 1, the plasma display panel includes two glass substrates 1 and 6 facing each other apart. On the glass substrate 1, the scan electrode 4 and the sustain electrode 5 are formed in pairs and in parallel, and the scan electrode 4 and the sustain electrode 5 are covered with the dielectric layer 2 and the protective film 3. have. A plurality of address electrodes 8 are formed on the glass substrate 6, and the address electrodes 8 are covered with the insulator layer 7. The address electrode 8 and the partition 9 are formed on the insulator layer 7 between the address electrodes 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both sides of the partition wall 9. The glass substrates 1 and 6 are disposed to face each other with the discharge space 11 therebetween so that the scan electrode 4, the address electrode 8, the sustain electrode 5, and the address electrode 8 are orthogonal to each other. The discharge space 11 at the intersection of the address electrode 8 and the paired scan electrode 4 and the sustain electrode 5 forms a discharge cell 12.

As shown in FIG. 2, the electrode of the plasma display panel has a matrix structure of n × m. The plurality of address electrodes A ₁ -A _m are arranged in the vertical direction, and the plurality of scan electrodes Y ₁ -Y _n and the storage electrodes X ₁ -X _n are arranged in pairs in the horizontal direction.

In general, each subfield includes a reset period, an address period, and a sustain period. The reset period serves to erase the wall charges formed by the previous sustain discharge and to set up the wall charges in order to stably perform the next address discharge. The address period is a period in which a wall charge is accumulated in a cell (addressed cell) that is turned on by selecting a cell that is turned on and a cell that is not turned on in the panel. The sustain period is a period in which sustain discharge is performed to actually display an image in the addressed cells.

In general, in order to implement a high-efficiency plasma display panel, the ratio of xenon (Xe) in the discharge gas is improved to increase luminous efficiency and luminance. As described above, when the plasma display panel is driven by increasing the ratio of the high pressure gas and xenon, the unit light generated by the sustain discharge increases and thus low gray level expression is a serious problem.

In general, a plasma display panel is driven by dividing one frame into a plurality of subfields, and a gray level is expressed by a combination of each subfield.

3 is a view showing the amount of light emitted from a driving waveform and a subfield of a conventional plasma display panel.

In the plasma display panel, the low gray scale expressive power may be increased only when a minimum discharge occurs in a subfield representing the minimum gray scale (unit light).

As shown in FIG. 3, the light of the subfield of weight 1 representing the minimum gray scale in the plasma display panel is generated during one sustain discharge during the light generated in the reset period and the light generated in the cell selected in the address period and the sustain period. It is expressed as the sum of light.

The reset period in the subfield of weight 1 consists of a rising ramp period and a falling ramp period. Here, the reset discharge in the reset period is weak, and the light generated by the reset discharge is almost ignored. Therefore, the subfield of weight 1 indicating gray level 1 may be represented by address light and sustain light.

However, since a large amount of light emission is generated by one address discharge (address light) and one sustain discharge (sustain light) generated in a subfield having a weight of 1, such a plasma display panel cannot express low gray levels. There is a limit. In addition, in the plasma display panel using high xe to increase the luminous efficiency, a lower minimum unit light is required in order to maximize the expressiveness of low grayscale.

The technical problem to be solved by the present invention is to solve the above problems, a method of driving a plasma display panel and a plasma display device that can maximize the low gradation power by reducing the minimum unit light in the sub-field expressing the minimum gradation Is to provide.

In order to achieve the above object, according to an aspect of the present invention, one frame of the plasma display panel in which the discharge cells are formed by the scan electrode, the sustain electrode and the address electrode is divided into a plurality of subfields having respective weights, A method of driving a plasma display panel in which gray levels are displayed by a combination of subfields is provided. In the driving method, in a first subfield having the lowest weight among the plurality of subfields, a first voltage is applied to each of the scan electrode and the address electrode of a discharge cell to be selected from among the discharge cells during an address period. Applying a second voltage; And (b) floating the address electrode after applying the second voltage to the address electrode. The method may further include applying one sustain discharge pulse having a third voltage to the scan electrode.

The method may further include slowly increasing the voltage of the scan electrode to a fourth voltage in a state where a third voltage is applied to the scan electrode. In this case, the rising voltage applied to the scan electrode is included in the reset period of the subfield after the first subfield.

The method may further include gently lowering the voltage of the scan electrode to the fifth voltage while the third voltage is applied to the scan electrode. In this case, the falling voltage applied to the scan electrode is included in the reset period of the subfield after the first subfield.

According to another feature of the present invention, a plasma display panel in which a discharge cell is formed between a scan electrode, a sustain electrode, and an address electrode, and one frame in the plasma display panel are divided into a plurality of subfields having respective weights, and a reset period. And a driving circuit for applying a driving voltage to the scan electrode, the sustain electrode and the address electrode for each subfield during an address period and a sustain period. The driving circuit applies a scan pulse and an address pulse to the scan electrode and the address electrode of the discharge cell to be selected, respectively, during the address period of the first subfield displaying the low gray scale among the plurality of subfields, and the address The pulse is given in decreasing form at the first voltage.

After the first voltage is applied to the address electrode, the first voltage is blocked.

In addition, the driving circuit applies one sustain discharge pulse to the scan electrode during the sustain period of the first subfield.

A method of driving a plasma display panel according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

First, with reference to the accompanying drawings will be described in detail to be easily carried out by those of ordinary skill in the art with respect to embodiments of the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In describing the present invention, when it is determined that the detailed description of the related known function or configuration may unnecessarily obscure the gist of the present invention, the detailed description is omitted.

4 is a diagram illustrating a plasma display panel according to an exemplary embodiment of the present invention.

As shown in FIG. 4, a plasma display panel according to an exemplary embodiment of the present invention includes a plasma panel 100, a controller 200, an address electrode driver 300, a sustain electrode driver 400, and a scan electrode driver 500. Include.

The plasma panel 100 includes a plurality of address electrodes A1 to Am arranged in the column direction, a plurality of sustain electrodes X1 to Xn arranged in the row direction, and scan electrodes Y1 to Yn.

The controller 200 receives an image signal from the outside and outputs an address electrode driving control signal, a sustain electrode driving control signal, and a scan electrode driving control signal.

The address electrode driver 300 receives an address electrode driving control signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode.

The sustain electrode driver 400 receives the sustain electrode driving control signal from the controller 200 and applies a driving voltage to the sustain electrode.

The scan electrode driver 500 receives a scan electrode driving control signal from the controller 200 and applies a driving voltage to the scan electrode.

Then, data is displayed on the plasma panel 100.

The generation of the scan electrode driving signal, the sustain electrode driving signal, and the address electrode driving signal of the controller 200 will be described in detail with reference to FIGS. 5 to 7.

In the first to third embodiments of the present invention, a driving method capable of maximizing low gradation representation of a plasma display panel is disclosed.

In the plasma display panel, the minimum unit light is represented by the sum of the reset light, the address light, and the sustain light in the weight 1 subfield. However, since the reset light by the reset discharge in the reset period is weak and almost ignored, the minimum unit light is substantially represented by the address light and the sustain light in the weight 1 subfield.

FIG. 5 is a diagram showing a driving waveform of the plasma display panel and the amount of light emitted in each subfield according to the first embodiment of the present invention.

As shown in FIG. 5, the weight 1 subfield representing the low gray level in the driving waveform according to the first embodiment of the present invention includes a reset period, an address period, and a sustain period.

In the plasma display panel, a scan / hold driving circuit (not shown) for applying a driving voltage to the scan electrode (Y) and the sustain electrode (X) in each period and an address driving circuit for applying a driving voltage to the address electrode (A) in each period. (Not shown) is connected. The driving circuit and the plasma display panel are connected to form one plasma display device.

The reset period of the weight 1 subfield includes a rising ramp period and a falling ramp period. The ramp-up period is applied to the lamp voltage gradually rises to V _set voltage V _s in the voltage to the scan electrode (Y). Then, while the ramp voltage rises, a weak reset discharge occurs from the scan electrode Y to the address electrode A and the sustain electrode X, respectively. And the ramp-down period, a ramp voltage is applied to lower the sustain electrode (X) at the V _s voltage to the scan electrode (Y) while maintaining the voltage V _e -V to _nf voltage. This suppresses the discharge between the scan electrode Y and the sustain electrode X, and causes a weak discharge between the scan electrode Y and the address electrode A. FIG. Therefore, in the reset period, very weak reset light is generated and hardly affects the minimum unit light.

Next, in the address period according to the exemplary embodiment of the present invention, the scan electrode having the voltage of -V _sc is sequentially applied to the scan electrode Y while the other scan electrode Y is maintained at the voltage V _n. Select). After applying the address pulse having the voltage V _a to the address electrode A located in the discharge cell to be selected among the discharge cells formed by the scan electrode Y to which the -V _sc voltage is applied, the address electrode A is applied. Plot

Specifically, first, a negative voltage of -V _sc is applied to the scan electrode Y in the first row, and a positive voltage is applied to the address electrode A located in the discharge cell to be displayed in the first row. Apply the voltage V _a and plot it.

In other words, when applying the voltage V _a to the address electrode (A), V is _a voltage applied to the address electrode (A) and _sc -V voltage is applied in the discharge cells formed by the scan electrode (Y) address electrodes (A ) And the scan electrode Y and between the sustain electrode X and the scan electrode Y.

Then, as shown in Fig. 5, after the discharge is started by applying the voltage V _a to the address electrode A in the address period of the weight 1 subfield, if the address electrode A is in a floating state, the wall charge At the same time, the supply of charge from the outside is cut off, and the voltage inside the discharge space is drastically reduced. Voltage (V _a) of floating the address electrode (A) is gradually reduced as shown in FIG. 5 as the reduction in the discharge space voltage. When the voltage in the discharge space decreases abruptly, the discharge in the discharge space disappears, resulting in a weaker discharge than the conventional address discharge. As a result, the address light is also reduced.

Here, the wall charge refers to a charge that is formed on the wall of the discharge cell (eg, the dielectric layer) close to each electrode and accumulates in the electrode. This wall charge is not actually in contact with the electrode itself, but here the wall charge is described as "formed", "accumulated" or "stacked" on the electrode. In addition, a wall voltage refers to the potential difference formed in the wall of a discharge cell by wall charge.

Next, while applying the voltage -V _sc to the scan electrode Y in the second row, the voltage V _a is applied to the address electrode A located in the discharge cell to be displayed in the second row, and then floated. Then, as before, the wall charges accumulate and at the same time the discharge in the discharge space disappears.

Similarly, the scan electrodes Y of the remaining rows are sequentially applied with _a voltage of V _a to the address electrodes located in the discharge cells to be displayed while applying -V _sc voltage, and then floated to generate weaker address discharges than in the conventional driving waveform. To form less wall charge. In FIG. 5, for convenience, the addressing operation occurs only once in the address period. The final voltage (-V _nf ) applied to the scan electrode (Y) in the falling ramp period of the reset period and the voltage (-V _sc ) applied to the scan electrode (Y) to select the discharge cell in the address period are the same. But it may be different.

In the sustain period, the reference voltage (0 V) is applied to the sustain electrode X while applying the V _s voltage to the scan electrode Y first. Then, in the discharge cell selected in the address period, the scan electrode (Y) and the sustain electrode (X) wall voltage due to the wall charges formed in the scan electrode (Y) and the sustain electrode (X) formed in the address period to V _s the voltage between the Since the voltage is added, the discharge start voltage is exceeded, and one sustain discharge occurs between the scan electrode Y and the sustain electrode X. However, as described above, since the wall charges formed in the address period are formed less than in the conventional driving waveform, weaker sustain discharge occurs than the conventional sustain discharge. Therefore, less holding light is generated than light by conventional sustaining discharge.

In other words, according to the first embodiment of the present invention, the address voltage to the address electrode (A) during the address period (V _a) the addressing light and yujik light is reduced to represent the low gradation by applying after floating the minimum unit of light intensity The level is reduced, and as a result, the low gradation power can be improved.

Next, the weight 2 subfield includes a reset period, an address period, and a sustain period. And the reset period includes an erase period, a rising ramp period and a falling ramp period.

In the erase period of the reset period, the scan electrode Y is held at the reference voltage (0V) while the wall charges are formed on the scan electrode Y and the sustain electrode X in the sustain period of the weight 1 subfield. A waveform rising slowly to the voltage V _{e is} applied to the electrode X. Then, the wall discharge of the discharge cells due to the sustain discharge is reduced, so that the sustain discharge ends.

Thereafter, the rising ramp period, the falling ramp period and the address period of the reset period are the same as in the weight 1 subfield representing the minimum unit light described above, and thus detailed description thereof will be omitted.

Since the rising ramp period and the falling ramp period are the same as in the weight 1 subfield described above, a detailed description thereof will be omitted.

Next, in the address period, a scan pulse and an address pulse are applied to the scan electrode Y and the address electrode A to select the discharge cells to be displayed. In this case, the width of the scan pulse is longer than the width of the corresponding scan pulse in the weight 1 subfield. In the sustain period, more sustain discharge pulses for sustain discharge are applied than in the weight 1 subfield.

Subfields starting from the reset period are continued in the same manner as the weight 2 subfield.

In the first embodiment of the present invention, the sustain discharge pulse is applied to the sustain period of the weight 1 subfield, and the erase period may be removed to erase the wall charges formed in the sustain period of the weight 1 subfield. Hereinafter, such an embodiment will be described with reference to FIGS. 6 and 7.

FIG. 6 is a diagram showing driving waveforms and amounts of light emitted in each subfield of the plasma display panel according to the second exemplary embodiment of the present invention.

The reset period consists of a rising ramp period and a falling ramp period.

That is, look at the 6, V _s the voltage V _s the voltage applied to the scan electrode (Y) during a sustain period of the weighted first sub-field is applied to the scan electrode (Y) in the initial period of the reset period, the weight of 2 sub-fields, and As shown in FIG. 6, the sustain discharge pulse of the sustain period of the weight 1 subfield can be expressed in combination with the initial period of the reset period of the weight 2 subfield to which the V _s voltage is applied to the scan electrode Y. have..

In this case, the scan electrodes Y and the sustain electrodes X are respectively negative (-) by the voltage V _s applied to the scan electrode Y and the reference voltage 0V applied to the sustain electrode Y during the sustain period. In the state in which the wall charge and the positive wall charge are formed, negative wall charges and positive wall charges may be further formed on the scan electrode Y and the sustain electrode X, respectively, in a rising ramp waveform.

FIG. 7 is a view showing driving waveforms and amount of light emitted in each subfield of the plasma display panel according to the third exemplary embodiment of the present invention.

Referring to FIG. 7, to remove the erase period, as shown in Figure 6, and the weight of 1 sub-field in a reset period of a subfield subsequent to the scan electrode (Y) of the immediately preceding subfield V _s the voltage is the scan electrode (Y in the applied state ) To the voltage of -V _nf . In this case, the negative (-) walls of the scan electrode (Y) and the sustain electrode (X) are respectively applied by the V _s voltage applied to the scan electrode (Y) and the reference voltage (0 V) applied to the sustain electrode (Y) during the sustain period. In the state where the charge and the positive wall charge are formed, the negative and negative wall charges formed on the scan electrode Y and the sustain electrode X can be erased by the falling ramp waveform.

In FIGS. 5 to 7, the drawings of the light emission amounts are shown in a straight line, but they are shown to indicate that light emission occurs. In practice, the shape may be somewhat different. In the above description, the weight of the subfield 1 has been described as a weight of 1, but this represents a minimum weight for convenience, which indicates a minimum weight of 0.5 or 0.25.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the present invention, there is an effect of maximizing the low gray scale expression power than in the conventional driving waveform.

Claims (7)

One frame of the plasma display panel in which the discharge cells are formed by the scan electrode, the sustain electrode, and the address electrode is divided into a plurality of subfields having respective weights, and the plasma display panel driving the plasma display panel in which gray levels are displayed by the combination of the respective subfields is driven. In the way, In a first subfield having the lowest weight among the plurality of subfields, During the address period, (a) applying a first voltage and a second voltage to the scan electrode and the address electrode of a discharge cell to be selected among the discharge cells; (b) floating the address electrode after applying the second voltage to the address electrode; Method of driving a plasma display panel comprising a. The method of claim 1, During the sustain period, applying one sustain discharge pulse having a third voltage to the scan electrode; Method of driving a plasma display panel comprising a. The method of claim 2, Gently raising the voltage of the scan electrode to a fourth voltage while a third voltage is applied to the scan electrode; The rising voltage applied to the scan electrode is included in the reset period of the subfield after the first subfield. The method of claim 2, Gently lowering the voltage of the scan electrode to a fifth voltage while the third voltage is applied to the scan electrode; More, The falling voltage applied to the scan electrode is included in the reset period of the subfield after the first subfield. A plasma display panel in which discharge cells are formed between scan electrodes, sustain electrodes and address electrodes, and In the plasma display panel, a frame is divided into a plurality of subfields having respective weights, and a driving voltage is applied to the scan electrode, the sustain electrode, and the address electrode for each subfield during a reset period, an address period, and a sustain period. Circuitry, The drive circuit, During the address period of the first subfield displaying the low gray scale among the plurality of subfields, a scan pulse and an address pulse are applied to the scan electrode and the address electrode of the discharge cell to be selected, respectively, And the address pulse is provided in a decreasing form after the first voltage is applied during the first period. The method of claim 5, And the first voltage is cut off after the first voltage is applied to the address electrode. The method of claim 6, The drive circuit, And a sustain discharge pulse is applied to the scan electrode during the sustain period of the first subfield.

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