KR100560513B1 - Driving method of plasma display panel and plasma display device - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel and a plasma display device. In particular, in the method of driving a plasma display panel, a first voltage and an address voltage are applied to the first electrode and the address electrode of a discharge cell to be selected among the discharge cells during an address period, respectively. During the sustain period, a second voltage for sustain discharge is applied to the first electrode and a third voltage is applied to the address electrode. In this case, the third voltage is greater than the voltage applied to the address electrode during the sustain period of the other subfield having a higher weight than the first subfield.

 In this way, the low gray scale expressive power can be improved by reducing the minimum unit light indicating the minimum weight.

Plasma Display Panel, Minimum Unit Light, Low Gradation, Subfield

Description

Plasma display panel driving method and plasma display device {DRIVING METHOD OF PLASMA DISPLAY PANEL AND PLASMA DISPLAY DEVICE}

1 is a partial perspective view of a typical plasma display panel.

2 is an electrode array diagram of a general plasma display panel.

3 is a view showing the amount of light emitted from a driving waveform and a subfield of a conventional plasma display panel.

4 is a diagram illustrating a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 5 is a diagram showing a driving waveform of the plasma display panel and the amount of light emitted in each subfield according to the first embodiment of the present invention.

FIG. 6 is a diagram showing driving waveforms and amounts of light emitted in each subfield of the plasma display panel according to the second exemplary embodiment of the present invention.

7 is a view showing a driving waveform of the plasma display panel according to the third embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP), and more particularly, to a plasma display panel driving method and a plasma display apparatus capable of maximizing low gray scale expression.

Recently, PDPs have been in the spotlight as flat panel display devices due to their high brightness, high luminous efficiency, and wide viewing angles, compared to other display devices.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. First, the structure of the plasma display panel will be described with reference to FIGS. 1 and 2.

1 is a partial perspective view of a plasma display panel, and FIG. 2 shows an electrode arrangement diagram of the plasma display panel.

As shown in FIG. 1, the plasma display panel includes two glass substrates 1 and 6 facing each other apart. On the glass substrate 1, the scan electrode 4 and the sustain electrode 5 are formed in pairs and in parallel, and the scan electrode 4 and the sustain electrode 5 are covered with the dielectric layer 2 and the protective film 3. have. A plurality of address electrodes 8 are formed on the glass substrate 6, and the address electrodes 8 are covered with the insulator layer 7. The address electrode 8 and the partition 9 are formed on the insulator layer 7 between the address electrodes 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both sides of the partition wall 9. The glass substrates 1 and 6 are disposed to face each other with the discharge space 11 therebetween so that the scan electrode 4, the address electrode 8, the sustain electrode 5, and the address electrode 8 are orthogonal to each other. The discharge space 11 at the intersection of the address electrode 8 and the paired scan electrode 4 and the sustain electrode 5 forms a discharge cell 12.

As shown in FIG. 2, the electrode of the plasma display panel has a matrix structure of n × m. The plurality of address electrodes A ₁ -A _m are arranged in the vertical direction, and the plurality of scan electrodes Y ₁ -Y _n and the storage electrodes X ₁ -X _n are arranged in pairs in the horizontal direction.

In general, each subfield includes a reset period, an address period, and a sustain period. The reset period serves to erase the wall charges formed by the previous sustain discharge and to set up the wall charges in order to stably perform the next address discharge. The address period is a period in which a wall charge is accumulated in a cell (addressed cell) that is turned on by selecting a cell that is turned on and a cell that is not turned on in the panel. The sustain period is a period in which sustain discharge is performed to actually display an image in the addressed cells.

In general, in order to implement a high-efficiency plasma display panel, the ratio of xenon (Xe) in the discharge gas is improved to increase luminous efficiency and luminance. As described above, when the plasma display panel is driven by increasing the ratio of the high pressure gas and xenon, the unit light generated by the sustain discharge increases and thus low gray level expression is a serious problem.

In the plasma display panel, one frame is driven by dividing into a plurality of subfields, and a gray level is expressed by a combination of each subfield.

3 is a view showing the amount of light emitted from a driving waveform and a subfield of a conventional plasma display panel.

As shown in FIG. 3, the smallest unit light in the plasma display panel, that is, the light of the subfield 1 (weight 1), is generated during one sustain discharge during the light generated in the reset period and the light generated in the cell selected in the address period and the sustain period. It is expressed as the sum of generated light. The reset period of subfield 1 (weight 1) is composed of a rising ramp period and a falling ramp period. Here, the reset discharge in the reset period is weak, and the reset light generated by the reset discharge is almost ignored. Therefore, the subfield 1 displaying the gradation 1 is represented by the address light and the sustain light. As described above, since a considerable amount of light emission is generated by the address discharge and one sustain discharge in the subfield 1, a considerable amount of light emission occurs even when the minimum number of sustain discharges is performed once for the low gray level representation in the driving waveform of the conventional plasma display panel. There is a limit to express low gradation.

Therefore, at present, when high xen is used to increase luminous efficiency, a lower minimum unit light is required in order to maximize low gray scale expressive power.

SUMMARY OF THE INVENTION The present invention has been made in an effort to solve the above problems, and to provide a plasma display panel driving method and a plasma display device for maximizing low gray scale expressive power by reducing minimum unit light.

In order to achieve the above object, according to an aspect of the present invention, one frame of the plasma display panel in which the discharge cells are formed by the first electrode, the second electrode and the address electrode is divided into a plurality of subfields having respective weights. A method of driving a plasma display panel in which gray levels are displayed by dividing and combining each subfield is provided. In this driving method, a first voltage and an address voltage are respectively provided to the first electrode and the address electrode of a discharge cell to be selected among the discharge cells during an address period in a first subfield having the lowest weight among the plurality of subfields. And a second step of applying a third voltage to the address electrode while applying a second voltage for sustain discharge to the first electrode during the sustain period. In this case, the third voltage is a voltage larger than the voltage applied to the address electrode during the sustain period of another subfield having a higher weight than the first subfield.

The third voltage may be a voltage having the same level as the address voltage. In the sustain period of the first subfield, one sustain discharge pulse is applied to the first electrode for sustain discharge.

The method may further include slowly increasing the voltage of the first electrode to a fourth voltage in a state in which the second voltage is applied to the first electrode. In this case, the rising voltage applied to the first electrode is included in the reset period of the subfield after the first subfield.

The method may further include gently lowering the voltage of the first electrode to a fifth voltage while the second voltage is applied to the first electrode. In this case, the falling voltage applied to the first electrode is included in the reset period of the subfield after the first subfield.

According to another feature of the present invention, a plasma display panel in which discharge cells are formed between a first electrode, a second electrode, and an address electrode, and one frame is divided into a plurality of subfields having respective weights in the plasma display panel, A plasma display device including a driving circuit for applying a driving voltage to the first electrode, the second electrode, and the third electrode for each subfield during a reset period, an address period, and a sustain period is provided. The driving circuit is configured to apply a first voltage for sustain discharge to the first electrode during the sustain period in a first subfield displaying low gray scale among the plurality of subfields, and simultaneously apply a second voltage to the address electrode. Is authorized. In this case, the second voltage is greater than the voltage applied to the address electrode during the sustain period of another subfield displaying a gray level higher than the first subfield.

A method of driving a plasma display panel according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

First, with reference to the accompanying drawings will be described in detail to be easily carried out by those of ordinary skill in the art with respect to embodiments of the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the following description of the present invention, detailed descriptions of related known functions or configurations are omitted when it is determined that the detailed description may unnecessarily obscure the subject matter of the present invention.

4 is a diagram illustrating a plasma display panel according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the plasma display panel according to an exemplary embodiment of the present invention includes a plasma panel 100, a controller 200, an address driver 300, a sustain electrode driver 400, and a scan electrode driver 500. do.

The plasma panel 100 includes a plurality of address electrodes A1 to Am arranged in the column direction, a plurality of sustain electrodes X1 to Xn arranged in the row direction, and scan electrodes Y1 to Yn.

The control unit 200 receives an image signal from the outside and outputs an address driving control signal, a sustain electrode (X electrode) driving control signal, and a scanning electrode Y driving control signal.

The address driver 300 receives an address driving control signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode.

The sustain electrode driver 400 receives the sustain electrode X driving control signal from the controller 200 and applies a driving voltage to the sustain (X) electrode.

The scan electrode driver 500 receives the scan electrode Y driving control signal from the controller 200 and applies a driving voltage to the scan Y electrode.

Then, data is displayed on the plasma panel 100.

The generation of the scan electrode driving signal, the sustain electrode driving signal, and the address electrode driving signal of the controller 200 will be described in detail with reference to FIGS. 5 to 7.

In the first to third embodiments of the present invention, a driving method capable of maximizing low gradation representation of a plasma display panel is disclosed.

The low gradation of the plasma display panel is expressed by the sum of the reset light, the address light, and the sustain light in the light of the subfield 1 (the subfield of the weight 1) (that is, the minimum unit light).

FIG. 5 is a diagram showing a driving waveform of the plasma display panel and the amount of light emitted in each subfield according to the first embodiment of the present invention.

As shown in Fig. 5, in the driving waveform according to the first embodiment of the present invention, subfield 1 (subfield of weight 1) includes a reset period, an address period, and a sustain period. In the plasma display panel, a scan / hold driving circuit (not shown) for applying a driving voltage to the scan electrode (Y) and the sustain electrode (X) in each period and an address driving circuit for applying a driving voltage to the address electrode (A) in each period. (Not shown) is connected. The driving circuit and the plasma display panel are connected to form one plasma display device.

Subfield 1 (the subfield of weight 1) includes a reset period, an address period, and a sustain period.

The reset period of subfield 1 (the subfield of weight 1) includes a rising ramp period and a falling ramp period. The ramp-up period is applied to the lamp voltage gradually rises to V _set voltage V _s in the voltage to the scan electrode (Y). Then, a weak reset discharge occurs from the scan electrode Y to the address electrode A and the sustain electrode X while the lamp voltage rises. In the falling lamp period, a ramp voltage falling from the V _s voltage to the -V _nf voltage is applied to the sustain electrode X while the V _e voltage is maintained. This suppresses the discharge between the scan electrode Y and the sustain electrode X, and causes a weak discharge between the scan electrode Y and the address electrode A. FIG. Therefore, very weak reset light is generated in the reset period.

Next, in the address period, the scan electrode Y and the address electrode A are first selected to select the discharge cells to be displayed while the scan electrode Y and the sustain electrode X are held at the V _n voltage and the V _e voltage, respectively. Apply voltage to). That is, first, a negative voltage V _sc is applied to the scan electrode Y in the first row, and a positive voltage V _{a is} applied to the address electrode A located in the discharge cell to be displayed in the first row. Is authorized. Thus, in the discharge cells formed by the address electrode A to which the voltage V _a is applied and the scan electrode Y to which the V _sc voltage is applied, between the address electrode A and the scan electrode Y and the sustain electrode X And an address discharge occur between and scan electrode Y. That is, the discharge cells formed by the address electrode A to which the voltage V _a is applied and the scan electrode Y to which the -V _sc voltage is applied, that is, the scan electrodes Y and the address electrodes A are applied. In _a discharge cell whose voltage difference is (V _a + V _sc ), an address discharge occurs between the address electrode A and the scan electrode Y and between the sustain electrode X and the scan electrode Y.

Next, while applying the V _sc voltage to the scan electrode Y in the second row, the V _a voltage is applied to the address electrode A located in the discharge cell to be displayed in the second row. Then, as described above, the address discharge occurs in the discharge cell formed by the address electrode A to which the voltage V _a is applied and the scan electrode Y to which the V _sc voltage is applied. Similarly, the scan electrodes Y in the remaining rows are sequentially applied with the V _sc voltage while applying the voltage V _a to the address electrodes located in the discharge cells to be displayed, thereby generating wall charges. Thus, address light is formed by address discharge. In FIG. 5, for convenience, the addressing operation occurs only once in the address period.

In the sustain period, first, when the V _s voltage is applied to the scan electrode Y, a reference voltage (0 V) is applied to the sustain electrode X, thereby performing one sustain discharge (between the scan electrode Y and the sustain electrode X). Sustain (sustain) light). At this time, the V _s voltage is lower than the discharge start voltage. However, since a considerable amount of light is expressed by only one sustain discharge, in the first embodiment of the present invention, unlike the conventional driving method, the scan electrode Y is maintained in the state where the sustain electrode X is maintained at the reference voltage (0 V). as the applied voltage V _s is applied to the address voltage V _a voltage of the address electrode (a). This suppresses the discharge between the scan electrode Y and the address electrode A through the priming particles generated by the discharge between the scan electrode Y and the sustain electrode X. That is, the unit light can be reduced by the amount of light emitted by the discharge generated between the scan electrode Y and the address electrode A. FIG.

Therefore, since the minimum unit light is expressed only by the discharge between the sustain electrode X and the scan electrode Y, the luminance level of the minimum unit light can be reduced to improve the low gradation power.

Figure 5, and although an address voltage of V _a voltage to the address electrode (A) is applied to the V _s voltage to the scan electrode (Y) while maintaining a reference voltage (0V) to the sustain electrode (X) state, not limited to, No. For example, a voltage higher than the voltage applied in the sustain period of the subfields other than the subfield 1 may be applied.

Next, the subfield of weight 2 includes a reset period, an address period, and a sustain period. And the reset period includes an erase period, a rising ramp period and a falling ramp period.

In the erase period of the reset period, the scan electrode Y is held at the reference voltage (0V) while the wall charges are formed on the scan electrode Y and the sustain electrode X in the sustain period of the weight 1 subfield. A waveform rising slowly to the voltage V _{e is} applied to the electrode X. Then, the sustain discharge is terminated by reducing the wall charge of the discharge cell due to the sustain discharge.

Since the rising ramp period and the falling ramp period are the same as in the weight 1 subfield described above, a detailed description thereof will be omitted.

Next, in the address period, the scan electrode Y and the address electrode A are first selected to select the discharge cells to be displayed while the scan electrode Y and the sustain electrode X are held at the voltages V _n and V _e , respectively. ), A scan pulse and an address pulse are applied. At this time, the scan pulse width is longer than the corresponding pulse width in the weight 1 subfield. In the sustain period, more sustain discharge pulses for sustain discharge are applied than in the weight 1 subfield.

Subfields starting from the reset period are continued in the same manner as the weight 2 subfield.

In the first embodiment of the present invention, the sustain discharge pulse is applied to the sustain period of the weight 1 subfield, and the erase period is provided to erase the wall charges formed in the sustain period of the weight 1 subfield. You can also remove it. Hereinafter, such an embodiment will be described with reference to FIGS. 6 and 7.

FIG. 6 is a diagram showing driving waveforms and amounts of light emitted in each subfield of the plasma display panel according to the second exemplary embodiment of the present invention.

The reset period consists of a rising ramp period and a falling ramp period.

That is, look at the 6, V _s the voltage V _s the voltage applied to the scan electrode (Y) during a sustain period of the weighted first sub-field is applied to the scan electrode (Y) in the initial period of the reset period, the weight of 2 sub-fields, and as shown in Figure 7 are identical, maintaining the sustain period of the first subfield weight discharge pulse is represented in combination with the initial period of the reset period of the second sub-field weights are applied to the V _s voltage to the scan electrode (Y).

And, the weight 1, thereby the sub-field after the sub-reset period of the field is increased to the scan electrode (Y) to V _s to the scan electrode (Y) in the voltage applied state is a voltage V _set of the immediately preceding subfield. In this case, the scan electrodes Y and the sustain electrodes X are respectively negative (-) by the voltage V _s applied to the scan electrode Y and the reference voltage 0V applied to the sustain electrode Y during the sustain period. In the state in which the wall charge and the positive wall charge are formed, negative wall charges and positive wall charges may be further formed on the scan electrode Y and the sustain electrode X, respectively, in a rising ramp waveform.

FIG. 7 is a view showing driving waveforms and amount of light emitted in each subfield of the plasma display panel according to the third exemplary embodiment of the present invention.

Referring to FIG. 7, to remove the erase period, as shown in Figure 6, and the weight of 1 sub-field in a reset period of a subfield subsequent to the scan electrode (Y) of the immediately preceding subfield V _s the voltage is the scan electrode (Y in the applied state ) To the voltage of -V _nf . In this case, the negative (-) walls of the scan electrode (Y) and the sustain electrode (X) are respectively applied by the V _s voltage applied to the scan electrode (Y) and the reference voltage (0 V) applied to the sustain electrode (Y) during the sustain period. In the state where the charge and the positive wall charge are formed, the negative and negative wall charges formed on the scan electrode Y and the sustain electrode X can be erased by the falling ramp waveform.

In FIGS. 5 to 7, the drawings of the light emission amounts are shown in a straight line, but they are shown to indicate that light emission occurs. In practice, the shape may be somewhat different. In the above description, the weight of the subfield 1 has been described as a weight of 1, but this represents a minimum weight for convenience, which indicates a minimum weight of 0.5 or 0.25.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the present invention, there is an effect of maximizing low gradation power by reducing the amount of light emitted by one sustain discharge that represents the minimum unit light in the conventional driving waveform.

Claims (9)

A plasma display panel in which one frame of the plasma display panel in which the discharge cells are formed by the first electrode, the second electrode, and the address electrode is divided into a plurality of subfields having respective weights, and gray levels are displayed by the combination of the respective subfields. In the method of driving, In a first subfield having the lowest weight among the plurality of subfields, A first step of applying a first voltage and an address voltage to the first electrode and the address electrode of a discharge cell to be selected among the discharge cells during an address period, and A second step of applying a third voltage to the address electrode while applying a second voltage for sustain discharge to the first electrode during the sustain period; And the third voltage is greater than a voltage applied to the address electrode during a sustain period of another subfield having a higher weight than the first subfield. The method of claim 1, And the third voltage is a voltage having the same level as the address voltage. The method of claim 2, And a sustain discharge pulse for sustain discharge is applied to the first electrode in the sustain period of the first subfield. The method of claim 3, wherein Gently raising the voltage of the first electrode to a fourth voltage while the second voltage is applied to the first electrode, The rising voltage applied to the first electrode is included in the reset period of the subfield after the first subfield. The method of claim 3, wherein Gently lowering the voltage of the first electrode to a fifth voltage while the second voltage is applied to the first electrode, The falling voltage applied to the first electrode is included in the reset period of the subfield after the first subfield. A plasma display panel in which discharge cells are formed between the first electrode, the second electrode, and the address electrode; and In the plasma display panel, one frame is divided into a plurality of subfields having respective weights, and a driving voltage is applied to the first electrode, the second electrode, and the third electrode for each subfield during a reset period, an address period, and a sustain period. It includes a driving circuit for applying, The drive circuit, In a first subfield indicating a low gray scale among the plurality of subfields, During the sustain period, a first voltage for sustain discharge is applied to the first electrode and a second voltage is applied to the address electrode. And the second voltage is larger than a voltage applied to the address electrode during a sustain period of another subfield displaying a gray level higher than the first subfield. The method of claim 6, The driving circuit applies a third voltage and an address voltage to the first electrode and the address electrode of a discharge cell to be selected among the discharge cells during an address period, respectively. And the second voltage is a voltage having the same level as the address voltage. The method of claim 7, wherein The driving circuit raises the voltage of the second electrode to the fourth voltage while applying the first voltage to the first electrode, And the rising voltage is included in a reset period of a subfield following the first subfield. The method of claim 7, wherein The driving circuit lowers the voltage of the second electrode to the fifth voltage while applying the first voltage to the first electrode, and the falling voltage is included in the reset period of the subfield following the first subfield. Display device.

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