KR100590749B1 - Thin Film Transistor Board for Liquid Crystal Display and Manufacturing Method - Google Patents

Abstract

First, a gate line including a gate line and a gate electrode is formed in a horizontal direction on the substrate by using a first mask, and a gate insulating film, a semiconductor layer made of amorphous silicon, a doped amorphous silicon layer, and a quad layer of data metal layers are sequentially stacked. The data metal layer is patterned using a second mask to form a data line, and the doped amorphous silicon layer is etched to form a contact layer. A protective mask, a photoresist film is laminated in sequence, and a third mask capable of partially adjusting the light transmittance is etched together with the protective film, the semiconductor layer, and the gate insulating film to complete the semiconductor pattern while simultaneously revealing the drain electrode, the data pad, and the gate pad. . In this case, the mask to be used has a pattern to reduce the light transmitted more than other portions in the portion corresponding to the gate wiring in order to leave the gate insulating film in a uniform thickness. This takes into account the reflectivity of the gate wirings. Here, the gate insulating film may be left in the pixel, or may be completely removed, and the semiconductor layer may be disposed on the gate line to prevent interference between signals transmitted to the two data lines by electrically connecting two adjacent data lines. It is preferable to separate. Subsequently, an ITO film is stacked and patterned using a fourth mask to form a pixel electrode connected to the drain electrode, a data electrode connected to the data pad, and a gate electrode connected to the gate pad.

Description

Thin film transistor substrate for liquid crystal display device and manufacturing method thereof

The present invention relates to a thin film transistor substrate for a liquid crystal display device and a manufacturing method thereof.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two substrates on which electrodes are formed and a liquid crystal layer interposed therebetween, and rearranges the liquid crystal molecules of the liquid crystal layer by applying a voltage to the electrode. By controlling the amount of light transmitted.

Among the liquid crystal display devices, a liquid crystal display device having a thin film transistor for forming an electrode on each of two substrates and switching a voltage applied to the electrode is generally used. The thin film transistor is generally formed on one of two substrates.

The substrate on which the thin film transistor is formed is generally manufactured through a photolithography process using a mask. At this time, in order to reduce the production cost, it is desirable to reduce the number of masks.

An object of the present invention is to simplify the method of manufacturing a thin film transistor substrate for a liquid crystal display device.

In order to achieve the above object, in the present invention, the intensity of transmitted light is partially controlled to leave the photoresist film at a different thickness, so that the photoresist film is patterned together with the protective film and the gate insulating film to leave the gate insulating film on the gate line. To do that.

In the method for manufacturing a thin film transistor substrate for a liquid crystal display device according to the present invention, first, a gate insulating film, a semiconductor layer, which forms a gate wiring including a gate line in a first direction and a gate electrode connected to the gate line, and covers the gate wiring; The doped amorphous silicon layer and the data conductor layer are sequentially stacked. Next, the data conductor layer is patterned to include a source electrode extending toward the gate electrode and extending in the second direction to intersect the gate line to define a pixel, and a drain electrode positioned opposite the source electrode to the gate electrode. Forming a data line, and etching the doped amorphous silicon layer not covered by the data line. A protective film and a photoresist film are sequentially stacked on the data wiring and the semiconductor layer, and the first part corresponding to the gate wiring, only part of the light can be transmitted, and the second part corresponding to the data wiring, and part of the drain electrode and the pixel where the light cannot be completely transmitted. The photoresist pattern is formed by a photo process using a mask that includes a third part that corresponds to the third part that can transmit more light than the first part. Next, the protective layer, the semiconductor layer, and the gate insulating layer are etched using the photoresist pattern as a mask to form a protective layer pattern exposing the drain electrode, a semiconductor pattern, and a gate insulating layer pattern covering the gate wiring, and connected to the drain electrode. To form.

Here, the photoresist layer may be formed of a double layer consisting of an upper layer and a lower layer having different photosensitivity, and may have a mosaic-like irregularity or a transparent and semi-transparent pattern and a slit pattern in a mask for controlling the intensity of transmitted light. It is also possible to form a coating film in which such a shape is formed. At this time, the size of the pattern or irregularities is smaller than the resolution of the light source used in the exposure step.

The gate line may further include a gate pad connected to the gate line to receive a signal from the outside, and the data line may further include a data pad connected to the data line to receive a signal from the outside. And a contact hole for exposing the pad and the data pad, and in this case, the method may further include forming the auxiliary gate pad and the auxiliary data pad in the same layer as the pixel electrode and connected to the gate pad and the data pad through the contact hole. .

Here, the pixel electrode may be formed on the substrate, or may be formed on the gate insulating film.

Then, the liquid crystal display according to an exemplary embodiment of the present invention and a manufacturing method thereof will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention.

In an embodiment of the present invention, in order to simplify the fabrication process, the photosensitive process is partially controlled to control the intensity of light passing through the mask, leaving the photoresist film at a different thickness to selectively etch to expose the pad portion when forming the semiconductor layer. Form a hole.

1 to 4, a structure of a thin film transistor substrate for a liquid crystal display according to a first exemplary embodiment will be described in detail. The structure of the thin film transistor substrate for a liquid crystal display device according to the first embodiment is manufactured according to the manufacturing method using the four-sheet mask described later.

FIG. 1 is a thin film transistor substrate for a liquid crystal display device according to a first embodiment of the present invention, and FIG. 2 is a cross-sectional view of the thin film transistor unit and the pixel unit of the thin film transistor substrate of FIG. 1 taken along a line II-II. FIG. 3 is a cross-sectional view of the gate pad unit illustrating the thin film transistor substrate of FIG. 1 taken along line III-III, and FIG. 4 is a diagram illustrating the thin film transistor substrate of FIG. 1 taken along line IV-IV. It is sectional drawing of a pad part.

A gate wiring made of a single film or a double film of aluminum or an aluminum alloy and chromium, molybdenum or molybdenum alloy is formed on the insulating substrate 10. The gate wirings are connected to the gate lines 22 and the ends of the gate lines 22 extending in the horizontal direction, and the branch of the gate pads 26 and the gate lines 22 which receive gate signals from the outside and transmit them to the gate lines. A gate electrode 24 of the phosphor thin film transistor.

On the substrate 10, a gate insulating film 30 made of silicon nitride (SiN _x ) covers the gate wirings 22 and 24, and a contact hole 36 exposing the gate pad 26 is formed in the gate insulating film 30. It is.

The semiconductor layers 42 and 44 are formed on the gate insulating layer 30 on the gate wirings 22 and 24, respectively. As shown in FIG. 4, the semiconductor layer 46 is also formed on the gate insulating layer 30 of the data pad portion. Is formed. At this time, the semiconductor layer 42 is formed along the gate line 22, as shown in FIG. 1.

Contact layers 52, 54, 56 made of a material such as n + hydrogenated amorphous silicon doped with a high concentration of n-type impurities are formed on the semiconductor layers 44, 46, respectively. 56, data lines 62, 64, and 66 made of chromium (Cr) or molybdenum-tungsten alloys are formed. The data lines 62, 64, and 66 are formed in a vertical direction to define pixels by crossing the gate line 22, and include a data line 62 and a data line 62 including a source electrode extending to the gate electrode 24. A drain electrode 64 connected to one end of the circuit board and separated from the data pad 66 and the data line 62 to which an image signal from the outside is applied, and located opposite to the source electrode with respect to the gate electrode 24. Include. Here, the contact layers 52, 54, and 56 have the same shape as the data lines 62, 64, and 66, and the semiconductor layer 46 under the data pad 66 has the same shape as the data pad 66. It is formed.

The gate line 22 and the data line (similar to the semiconductor layers 42 and 44 are formed on the semiconductor layer 44 and the semiconductor layer 42 not covered by the data wirings 62 and 64, the data wirings 62 and 64). Along with 62, protective films 72 and 74 are formed.

On the gate insulating layer 30 of the pixel portion, a pixel electrode 82 connected to the drain electrode 64 which is not covered by the passivation layer 74 is formed, and for the gate covering the gate pad 26 and the data pad 66. Data electrodes 84 and 86 are formed, respectively.

Here, the pixel electrode 82 overlaps the gate line 22 to form a storage capacitor.

In this structure, the semiconductor layers 42 and 44 are separated from each other in order to prevent parasitic channels from being formed due to the gate voltage in the semiconductor layers other than between the source electrode 62 and the drain electrode 64. In addition, when two neighboring data lines are electrically connected to each other through the semiconductor layer, a parasitic channel is formed to generate a leakage current in the semiconductor layer. As a result, signal interference occurs between the two data lines. It is necessary to separate the lower semiconductor layer.

Next, a method of manufacturing the thin film transistor substrate for a liquid crystal display device having the structure according to the first embodiment will be described in detail with reference to FIGS. 1 to 4 and 5A to 7C.

5A, 6A, and 7A are layout views of a thin film transistor substrate in an intermediate process of manufacturing according to an embodiment of the present invention, and are shown in sequence according to the manufacturing sequence. 5B, 6B, and 7B are views cut along the lines Vb-Vb, VIb-VIb, and VIIb-VIIb in FIGS. 5A, 6A, and 7A, respectively, and are cross-sectional views of the TFT portion, the pixel portion, and the storage capacitor portion. 5C, 6C, and 7C are cross-sectional views taken along the lines Vc-Vc, VIc-VIc, and VIIc-VIIc in FIGS. 5A, 6A, and 7A, and FIGS. 5D, 6D, and 7D are cross-sectional views of the gate pad portions, respectively. 6A and 7A are views taken along lines Vd-Vd, VId-VId, and VIId-VIId, respectively, and are sectional views of the data pad portion.

First, as shown in FIGS. 5A to 5D, a gate wiring including a gate line 22, a gate electrode 24, and a gate pad 26 is formed in a horizontal direction on a substrate 10 using a first mask. . As described above, the gate wirings 22, 24, and 26 may be made of a single film or a double film of aluminum or an aluminum alloy alloy film and molybdenum, molybdenum alloy, or chromium.

Next, as shown in Figs. 6A to 6D, the four layers of the gate insulating film 30, the semiconductor layer 40 made of amorphous silicon, the doped amorphous silicon layer, and the data metal layer made of chromium are successively laminated and the second mask is The data metal layer is patterned to form the data wires 62, 64, and 66, and the doped amorphous silicon layer exposed without being covered by the data wires 62, 64, and 66 is etched to form the data wires 62, 64, and the like. 66) forming contact layers 52, 54, 56 at the bottom.

Next, the protective film 70 made of silicon nitride or silicon oxide or the photosensitive organic insulating film and the photosensitive film 1000 are sequentially stacked, and the protective film is formed together with the semiconductor layer 40 and the gate insulating film 30 by a photo process using a third mask. Pattern. In this case, the third mask to be used is etched by dry etching after leaving a photosensitive film having a partially different thickness using a mask that can partially vary the intensity of transmitted light. This will be described in detail with reference to the drawings as follows.

8 is a plan view illustrating a third mask used in the method of manufacturing the thin film transistor substrate for a liquid crystal display according to the first embodiment of the present invention.

As shown in FIG. 8, the third mask used in the manufacturing process according to the embodiment of the present invention corresponds to a part of the data line 62 (see FIG. 6A) and the drain electrode 64 (see FIG. 6A) including the source electrode. The portion A is formed dark so that light cannot be transmitted, and the portion B corresponding to the gate pads 26 (see FIGS. 6A and 6C) is transparently formed so that most of the light is transmitted, and the remaining portion C The transparent and opaque mosaic patterns are formed to control the light intensity.

At this time, the mosaic pattern is formed to control the intensity of the transmitted light, but when the mask is a transparent substrate, mosaic irregularities can be formed to reduce the intensity of light by diffracting or dispersing the light, and reducing the intensity of light It is also possible to coat translucent membranes. In addition, the intensity of the light may be adjusted using a slit pattern. Here, the size of the pattern and the section and the spacing of the slit patterns should be smaller than the resolution of the exposure machine used in the photographic process.

When such a mask is used to apply a positive photosensitive register in an exposure process, irradiate and develop light with an exposure machine, the portion corresponding to A of FIG. 8 remains thick of the positive photosensitive resist, and the portion corresponding to B is completely removed. The portion corresponding to C including the pixel remains thinner than the portion A. That is, as shown in FIGS. 9A to 9C, the positive photosensitive resist 1000 is disposed on the upper portion of the data line 62 and the drain electrode 64 corresponding to A, and the passivation layer 70 on the gate line 22. Is thicker than the portion corresponding to C, and the positive photosensitive resist is removed on the gate pad 26 corresponding to B.

Subsequently, when the dry etching is performed with respect to the photosensitive resist 1000 and the passivation layer 70 by an etching condition having an almost similar etching ratio, as shown in FIGS. 7A to 7D, the data line 62 and the drain electrode 64 may be formed. A passivation layer 74 may be formed to cover a portion of the semiconductor layer 44 and a lower portion of the passivation layer 72. The passivation layer 72 may be formed on the gate line 22 and the passivation layer 72 may be formed below the passivation layer 74. In addition, the contact hole 36 of the gate insulating layer 30 exposing the gate pad 26 is formed, and the data pad 66 is exposed to form the semiconductor layer 46 thereunder.

Here, the passivation layer 72 and the semiconductor layer 42 on the gate line 22 may not be left, or may be left as in this embodiment to protect the gate line 22. When the passivation layer 72 and the semiconductor layer 42 are left on the gate line 22 as in this embodiment, two neighboring data lines 62 are electrically connected to each other to leak between the two data lines 62. Since the interference of the signal by the current occurs, the semiconductor layers 42 and 44 must be separated as in this embodiment.

Although a positive photosensitive film was used here, a negative photosensitive resist can also be used. In addition, in the previous embodiment, a single photoresist film was used to leave different thicknesses, but the photoresist films having different photosensitivity were formed in duplicate, leaving both double photoresist films at portions corresponding to A, and lower photoresist at portions corresponding to C. Only resist can be left. At this time, the upper photoresist film is formed of a material having a higher photosensitivity than the lower photoresist film. This makes it possible to leave the lower photoresist film with a uniform thickness in the portion corresponding to C than in the case of using a single photoresist film.

1 to 4, the contact holes 36 of the pixel electrode 82 and the gate insulating film 30 connected to the drain electrode 64 are formed by laminating an ITO film and performing patterning using a fourth mask. The gate electrode 84 covering the gate pad 26 and the data electrode 82 covering the data pad 66 are respectively formed through the gate electrode 26.

In the first embodiment according to the present invention, it is preferable that the gate pad portion has a two-layer structure in which the upper film is made of ITO film and the lower film is made of chromium, molybdenum or molybdenum alloy.

In the first embodiment described above, as shown in FIG. 8, a mask having a portion C capable of adjusting light intensity is used, but even when exposed using such a mask, the photosensitive film of the portion corresponding to C is irradiated. Since the intensity of the light is changed, the thickness of the photoresist film may be different in the portion corresponding to C after the development. That is, since the gate wiring is formed of a metal to generate reflected light, the intensity of light irradiated more than the other portions of the photosensitive film corresponding to the gate wiring increases, so that the photosensitive film pattern remains in a non-uniform thickness even in a portion corresponding to C. In addition, since the planarization is performed when the photoresist film is applied, the thickness of the photoresist film becomes relatively thinner than other portions in the part with convex unevenness such as the gate wiring on the upper portion of the substrate. At this time, if the light intensity is uniformly irradiated and developed using a mask having a C portion, the photoresist film remains thinner than other portions in the portion corresponding to the gate wiring. Therefore, in order to make the intensity of light irradiated to the photosensitive film of the portion corresponding to C as a whole uniform, it is preferable to use a mask having a pattern or irregularities that can further reduce the intensity of light in the portion corresponding to the gate wiring in the portion C. . In the second embodiment, the manufacturing method of the present invention using such a mask will be described in detail.

Since the thin film transistor substrate for a liquid crystal display according to the second exemplary embodiment of the present invention and its manufacturing method are similar to the structure and manufacturing method according to the first exemplary embodiment of the present invention described above, a detailed description thereof will be omitted. Only the structure of the mask used in the manufacturing method according to the second embodiment and the intensity of light transmitted through a portion corresponding to the gate wiring will be described.

FIG. 10 is a plan view illustrating a third mask used in a method of manufacturing a thin film transistor substrate for a liquid crystal display according to a second exemplary embodiment of the present invention.

As shown in FIG. 10, most of the masks 100 used in the method of manufacturing the thin film transistor substrate for a liquid crystal display according to the second embodiment of the present invention have a shape similar to that of the mask of the first embodiment.

However, unlike the mask of the first embodiment, the light intensity is further reduced only in the portion C corresponding to the gate wiring in the portion C in which the opaque mosaic pattern is formed so as to adjust the intensity of the light passing through the mask 100. The portion C 'in which the pattern is formed is formed. The reason for reducing the intensity of light transmitted through the portion C ′ is as described above. To prevent the thickness of the photoresist film remaining on the upper part of the gate wiring from being thinner than other portions corresponding to C due to convex unevenness such as the gate wiring even if light intensity is irradiated evenly or uniformly, the thickness of the photoresist film is uniformly formed. to be. This will be described in detail with reference to the accompanying drawings.

FIG. 11 is a cross-sectional view illustrating the intensity of light submitted to a mask in the method of manufacturing the thin film transistor substrate for a liquid crystal display according to the second exemplary embodiment of the present invention using the mask of FIG. 10.

As shown in FIG. 11, the mask 100 of the portion C ′ indicated by the dotted line has a width wider than that of the slit pattern 110 formed in the portion C to reduce the intensity of light incident from the upper portion of the mask. The slit pattern 111 is formed.

On the other hand, gate wirings 22 and 24 are formed on the substrate 10 corresponding to C ′, and the gate insulating film 30, the semiconductor layer 40, and the protective film 70 covering the gate wirings 22 and 24 are formed. ) Are formed one by one, and the photosensitive film 1000 is formed on the protective film 70.

At this time, when the light is irradiated from the upper portion of the mask 100 using an exposure machine, the intensity of the light passing through the mask 100 depends on the density of the slit patterns 110 and 111. That is, the intensity of light passing through the C portion where the slit pattern 110 is formed is greater than the intensity of light passing through the C ′ portion where the slit pattern 111 having a wider width than the slit pattern 110 is formed. do. The thickness of the arrow in the figure indicates the intensity of light. Therefore, considering only the light irradiated from the top, the photosensitive film corresponding to the portion C is irradiated with light more strongly than the photosensitive film corresponding to the portion C ′. However, the light reflected by the gate lines 22 and 24 is irradiated to the photosensitive film 1000 corresponding to the portion C ′. Therefore, if all the light irradiated to the photosensitive film 1000 is taken into consideration, the photosensitive film 1000 is irradiated with a uniform light intensity than the first embodiment, and when developed, the photosensitive film 100 is made to have a uniform thickness than the first embodiment. I can leave it. In the drawing, the portion indicated by the dotted line indicates the thickness of the photosensitive film 1000 remaining after the development.

Referring to FIGS. 1 and 2, in the manufacturing method according to the second exemplary embodiment of the present invention using the mask illustrated in FIG. 10, the gate covering the gate wires 22 and 24 not covered by the protective films 72 and 74 is described. The thickness of the insulating film 30 can be formed uniformly.

In the first and second embodiments, the masks of FIGS. 8 and 10 having patterns for adjusting the light intensity are used in the portion C corresponding to the pixel defined by the gate line 22 and the data line 62. The gate insulating film 30 was left in the pixel, and the pixel electrode 82 was formed thereon (see Fig. 2). In contrast, in the manufacturing method according to the third exemplary embodiment, only the gate insulating layer 30 covering the gate lines 22 and 24 may be formed by directly forming the pixel electrode on the substrate 10. To this end, the portion corresponding to the pixel is transparent to completely transmit the light as shown in the portion B of FIGS. 8 and 10, and the light intensity is adjusted as shown in the portion C ′ of FIG. 10 corresponding to the gate wirings 22 and 24. A mask having a pattern capable of blocking light passing through the portion A corresponding to the remaining protective layers 74 and 72 is used as shown in FIGS. 8 and 10. Such a mask may have a pattern capable of adjusting the intensity of light such as the portion C of FIGS. 8 and 10 adjacent to the portion C ′ in order to form the gate insulating layer 30 completely covering the gate lines 22 and 24. . After the patterning process is finished in the manufacturing process according to the third embodiment using such a mask, as described in the manufacturing method according to the first and second embodiments, the protective films 72 and 74 on the substrate 10 corresponding to A The semiconductor layers 44 and 42 and the gate insulating film 30 remain, and only the gate insulating film 30 remains on the substrate 10 corresponding to C or C ′, and the substrate 10 is exposed in the portion corresponding to B. . Subsequently, as in the first embodiment, when the pixel electrode 82, the gate electrode 84, and the data electrode 82 are formed, a thin film transistor substrate for a liquid crystal display device as shown in FIGS. 12 and 13 is formed. I can complete it. Here, detailed descriptions of the gate pad and the data pad will be omitted.

As shown in FIGS. 12 and 13, most of the structure is similar to that of FIGS. 1 and 2.

However, the pixel electrode 82 connected to the drain electrode 64 is formed on the substrate 10, and the gate insulating layer 30 is formed along the shape of the gate wirings 22 and 24 to form the gate wirings 22 and 24. ) Is extended and is formed along the shapes of the semiconductor layers 44 and 42 and the protective films 72 and 74.

According to the present invention, when the semiconductor layer is formed, the pad portion is simultaneously exposed to simplify the manufacturing process, thereby manufacturing the thin film transistor substrate for the liquid crystal display, thereby reducing the manufacturing cost. In addition, by separating the semiconductor layers in units of pixels, interference of signals can be effectively prevented.

1 is a layout view of a thin film transistor substrate for a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of the thin film transistor unit and the pixel unit in which the thin film transistor substrate illustrated in FIG. 1 is cut along the line II-II;

FIG. 3 is a cross-sectional view of the gate pad part of the thin film transistor substrate illustrated in FIG. 1 taken along a III-III line.

4 is a cross-sectional view of the data pad part of the thin film transistor substrate illustrated in FIG. 1 taken along the line IV-IV.

5A, 6A, and 7A are layout views of a thin film transistor substrate in an intermediate process of manufacturing according to an embodiment of the present invention.

5B, 6B, and 7B are cross-sectional views taken along the lines Vb-Vb, VIb-VIb, and VIIb-VIIb in FIGS. 5A, 6A, and 7A, respectively.

5C, 6C, and 7C are cross-sectional views taken along the lines Vc-Vc, VIc-VIc, and VIIc-VIIc in FIGS. 5A, 6A, and 7A, and

5D, 6D, and 7D are cross-sectional views taken along the lines Vd-Vd, VId-VId, and VIId-VIId in FIGS. 5A, 6A, and 7A, respectively.

8 is a plan view illustrating a third mask used in the method of manufacturing the thin film transistor substrate for a liquid crystal display according to the first embodiment of the present invention;

9A to 9C are cross-sectional views illustrating a method of manufacturing a thin film transistor substrate for a liquid crystal display according to a first embodiment of the present invention;

10 is a plan view of a mask used in a method of manufacturing a thin film transistor substrate for a liquid crystal display according to a second embodiment of the present invention;

11 is a cross-sectional view illustrating a method of manufacturing a thin film transistor substrate for a liquid crystal display according to a second embodiment of the present invention;

12 is a layout view illustrating a structure of a thin film transistor substrate for a liquid crystal display device, which illustrates a structure of a liquid crystal display device according to a third embodiment of the present invention;

FIG. 13 is a cross-sectional view taken along the line XIII-XIII in FIG. 12.

Claims (9)

Forming a gate line including a gate line formed on the insulating substrate and a gate electrode connected to the gate line, Sequentially depositing a gate insulating film, a semiconductor layer, a doped amorphous silicon layer, and a data conductor layer on the gate wiring and the substrate; Patterning the data conductor layer, the data electrode including a source electrode extending toward the gate electrode and defining a pixel to cross the gate line; a drain electrode positioned opposite the source electrode with respect to the gate electrode; Forming a data wiring, Etching the doped amorphous silicon layer not covered by the data line, Stacking a protective film and a photosensitive film on the data line and the semiconductor layer in order; A first portion corresponding to a part of the gate wiring and partially transmitting light, a second portion corresponding to the data wiring and a portion of the gate wiring, and corresponding to a part of the drain electrode and the pixel, wherein the light cannot be completely transmitted; Forming a photoresist pattern by a photo process using a mask including a third portion through which more light can be transmitted than the first portion, Forming a passivation layer pattern exposing the drain electrode, a semiconductor pattern, and a gate insulation layer pattern covering the gate wiring by etching the passivation layer, the semiconductor layer, and the gate insulating layer using the photoresist pattern as a mask; Forming a pixel electrode connected to the drain electrode and at least partially overlapping the gate line Method of manufacturing a thin film transistor substrate for a liquid crystal display device comprising a. In claim 1, And the mask further includes a fourth portion corresponding to the gate line and through which light cannot be completely transmitted. In claim 2, And manufacturing the thin film transistor substrate for the liquid crystal display device to separate the semiconductor layers under the data lines adjacent to each other in the semiconductor pattern forming step. In claim 1, The gate line further includes a gate pad connected to the gate line to receive a scan signal from the outside, The data line further includes a data pad connected to the data line to receive a data signal from the outside. The passivation layer pattern and the gate insulation layer pattern may have contact holes exposing the gate pad and the data pad, respectively. And forming an auxiliary gate pad and an auxiliary data pad in the same layer as the pixel electrode and connected to the gate pad and the data pad through the contact hole, respectively. In claim 1, The third portion is a method of manufacturing a thin film transistor substrate for a liquid crystal display device that completely transmits light. In claim 1, And the photosensitive film is formed of a double film including an upper film and a lower film having different photosensitivity. In claim 6, The method of manufacturing a thin film transistor substrate for a liquid crystal display device having a lower sensitivity of the lower layer than that of the upper layer. In claim 1, And a mosaic-shaped irregularities or transparent and opaque patterns and a slit pattern are formed in the mask to reduce light intensity. In claim 1, And a coating film is formed on the mask to reduce the light intensity.