KR100574730B1 - 난수 발생 회로 - Google Patents

난수 발생 회로 Download PDF

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Publication number
KR100574730B1
KR100574730B1 KR1020020058111A KR20020058111A KR100574730B1 KR 100574730 B1 KR100574730 B1 KR 100574730B1 KR 1020020058111 A KR1020020058111 A KR 1020020058111A KR 20020058111 A KR20020058111 A KR 20020058111A KR 100574730 B1 KR100574730 B1 KR 100574730B1
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KR
South Korea
Prior art keywords
circuit
flip
digital
logic circuit
random number
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KR1020020058111A
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English (en)
Korean (ko)
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KR20030027724A (ko
Inventor
후지따시노부
우찌다겐
오바류지
고가준지
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가부시끼가이샤 도시바
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58Random or pseudo-random number generators
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58Random or pseudo-random number generators
    • G06F7/588Random number generators, i.e. based on natural stochastic processes

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
KR1020020058111A 2001-09-26 2002-09-25 난수 발생 회로 Expired - Fee Related KR100574730B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JPJP-P-2001-00294836 2001-09-26
JP2001294836 2001-09-26
JPJP-P-2002-00183967 2002-06-25
JP2002183967A JP3604674B2 (ja) 2001-09-26 2002-06-25 乱数生成回路

Publications (2)

Publication Number Publication Date
KR20030027724A KR20030027724A (ko) 2003-04-07
KR100574730B1 true KR100574730B1 (ko) 2006-04-28

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Application Number Title Priority Date Filing Date
KR1020020058111A Expired - Fee Related KR100574730B1 (ko) 2001-09-26 2002-09-25 난수 발생 회로

Country Status (3)

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US (1) US7111029B2 (enExample)
JP (1) JP3604674B2 (enExample)
KR (1) KR100574730B1 (enExample)

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US8229108B2 (en) * 2003-08-15 2012-07-24 Broadcom Corporation Pseudo-random number generation based on periodic sampling of one or more linear feedback shift registers
JP4359130B2 (ja) 2003-12-05 2009-11-04 株式会社東芝 乱数生成素子
WO2005078573A1 (ja) * 2004-02-12 2005-08-25 Hitachi Ulsi Systems Co., Ltd. 乱数発生方法と半導体集積回路装置
US8566461B1 (en) 2004-06-09 2013-10-22 Digital River, Inc. Managed access to media services
US8566462B2 (en) * 2005-05-12 2013-10-22 Digital River, Inc. Methods of controlling access to network content referenced within structured documents
JP4549263B2 (ja) * 2005-09-01 2010-09-22 富士通セミコンダクター株式会社 乱数発生装置および乱数発生方法
JP4413858B2 (ja) 2005-12-13 2010-02-10 株式会社東芝 乱数検定回路
KR100829792B1 (ko) * 2006-04-04 2008-05-16 삼성전자주식회사 위상동기루프 회로를 구비한 난수 발생회로 및 난수발생방법
DE102006030888B4 (de) * 2006-07-04 2009-06-25 Infineon Technologies Ag Verfahren und Vorrichtung zum Erzeugen eines Startwertes für einen Pseudo-Zufallszahlengenerator
JP2008269314A (ja) * 2007-04-20 2008-11-06 Toshiba Corp 乱数生成装置および乱数生成方法
JP2008311118A (ja) * 2007-06-15 2008-12-25 Aitesu:Kk 有機el素子の駆動装置および駆動方法
US8966053B2 (en) * 2007-07-12 2015-02-24 Viasat, Inc. Methods and systems for performing a prefetch abort operation for network acceleration
US8549099B2 (en) * 2007-07-12 2013-10-01 Viasat, Inc. Methods and systems for javascript parsing
US8690065B2 (en) 2007-08-15 2014-04-08 Nxp B.V. Secure storage of a codeword within an integrated circuit
JP4427581B2 (ja) * 2008-01-08 2010-03-10 株式会社東芝 乱数生成回路
EP2260376B1 (en) * 2008-03-04 2011-11-16 SanDisk IL Ltd Digital random number generator based on digitally-controlled oscillators
JP2010039838A (ja) * 2008-08-06 2010-02-18 Mega Chips Corp 乱数生成回路及びコンピュータシステム
JP4538066B2 (ja) * 2008-08-26 2010-09-08 株式会社東芝 乱数生成装置
US20100281088A1 (en) * 2009-04-29 2010-11-04 Psigenics Corporation Integrated true random number generator
CA2781608C (en) 2009-11-25 2018-11-06 Aclara RF Systems Inc. Random number generator
WO2011117929A1 (ja) 2010-03-26 2011-09-29 富士通株式会社 乱数生成器、暗号化装置、及び認証装置
US20110299678A1 (en) * 2010-06-07 2011-12-08 Alexander Roger Deas Secure means for generating a specific key from unrelated parameters
JP5333669B2 (ja) 2010-06-30 2013-11-06 富士通株式会社 個体別情報生成装置及び個体別情報生成方法
TWI566184B (zh) * 2011-03-31 2017-01-11 Ict韓國有限公司 產生數位值的裝置與方法
JP2014224879A (ja) 2013-05-16 2014-12-04 株式会社メガチップス 乱数生成装置、暗号処理装置、記憶装置及び情報処理システム
JP6167876B2 (ja) * 2013-11-28 2017-07-26 富士通株式会社 電子回路、電子機器及び認証システム
KR102198499B1 (ko) * 2013-12-31 2021-01-05 주식회사 아이씨티케이 홀딩스 디지털 값 처리 장치 및 방법
JP6287785B2 (ja) * 2014-11-28 2018-03-07 ソニー株式会社 暗号処理装置、および暗号処理方法、並びにプログラム
US10170178B2 (en) 2017-05-09 2019-01-01 International Business Machines Corporation Secure off-chip MRAM
CN108509180B (zh) * 2018-04-13 2021-04-06 太原理工大学 一种基于二输入异或门低功耗随机数产生装置
JP6778785B1 (ja) 2019-04-26 2020-11-04 株式会社メガチップス 情報処理装置、プログラム、及び乱数生成方法
RU2741865C1 (ru) * 2020-07-17 2021-01-29 Комаров Юрий Олимпиевич Генератор истинно случайных чисел
CN116418509B (zh) * 2021-12-31 2025-03-11 圣邦微电子(北京)股份有限公司 序列号生成电路及终端对外部设备进行认证的方法
CN114281304A (zh) * 2022-01-12 2022-04-05 北京京东方技术开发有限公司 随机计算方法、电路、芯片及设备

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US5570307A (en) * 1995-01-06 1996-10-29 Vlsi Technology, Inc. Digital randomizer for on-chip generation and storage of random self-programming data block
JPH09146761A (ja) * 1995-11-28 1997-06-06 Oki Electric Ind Co Ltd 乱数発生回路
WO1997043709A1 (en) * 1996-05-15 1997-11-20 Intel Corporation Random number generator
EP0981081A2 (en) * 1998-08-19 2000-02-23 Japan Science and Technology Corporation Random number generating apparatus
KR20000023351A (ko) * 1998-09-28 2000-04-25 가네꼬 히사시 복수의 클록신호를 이용한 난수발생방법 및 장치

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US5365122A (en) * 1990-11-09 1994-11-15 Vlsi Technology, Inc. Meta stable resistant signal detector
US5963104A (en) * 1996-04-15 1999-10-05 Vlsi Technology, Inc. Standard cell ring oscillator of a non-deterministic randomizer circuit
GB9803055D0 (en) * 1998-02-12 1998-04-08 Nycomed Amersham Plc Method of and apparatus for generating random numbers
JP2001166920A (ja) 1999-12-07 2001-06-22 Mitsubishi Electric Corp 数値発生装置および数値発生応用装置
US6631390B1 (en) * 2000-03-06 2003-10-07 Koninklijke Philips Electronics N.V. Method and apparatus for generating random numbers using flip-flop meta-stability
US6480072B1 (en) * 2000-04-18 2002-11-12 Advanced Micro Devices, Inc. Method and apparatus for generating random numbers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5570307A (en) * 1995-01-06 1996-10-29 Vlsi Technology, Inc. Digital randomizer for on-chip generation and storage of random self-programming data block
JPH09146761A (ja) * 1995-11-28 1997-06-06 Oki Electric Ind Co Ltd 乱数発生回路
WO1997043709A1 (en) * 1996-05-15 1997-11-20 Intel Corporation Random number generator
EP0981081A2 (en) * 1998-08-19 2000-02-23 Japan Science and Technology Corporation Random number generating apparatus
KR20000023351A (ko) * 1998-09-28 2000-04-25 가네꼬 히사시 복수의 클록신호를 이용한 난수발생방법 및 장치

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Publication number Publication date
JP2003173254A (ja) 2003-06-20
US7111029B2 (en) 2006-09-19
JP3604674B2 (ja) 2004-12-22
KR20030027724A (ko) 2003-04-07
US20030061250A1 (en) 2003-03-27

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