KR100514581B1 - A method for manufacturing insulator for TFT - Google Patents

A method for manufacturing insulator for TFT Download PDF

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Publication number
KR100514581B1
KR100514581B1 KR10-1998-0033545A KR19980033545A KR100514581B1 KR 100514581 B1 KR100514581 B1 KR 100514581B1 KR 19980033545 A KR19980033545 A KR 19980033545A KR 100514581 B1 KR100514581 B1 KR 100514581B1
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insulating film
film
thin film
fluoride
tft
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KR10-1998-0033545A
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Korean (ko)
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KR20000014244A (en
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준 신 이
도 영 김
수 은 이
석 원 최
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도 영 김
이수은
석 원 최
준 신 이
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02269Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by thermal evaporation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

불화막 계열의 원소를 이용하여 절연막을 생성시킴으로써 우수한 계면상태와 양질의 게이트 절연층을 얻을 수 있도록 하기 위한 박막 트랜지스터용 절연막의 제조방법이 개시된다. 액체 질소를 이용하여 10-6torr 이하의 진공상태를 형성한 다음, 증착원으로 3∼5mm, 99.95%의 불화막 계열의 원소를 이용하여 반도체 기판상에 적어도 1층의 절연막을 형성시킨다. 본 발명은 실리콘 박막과 이종에피가 성장가능하고, 산소를 포함하고 있지 않은 불화막 계열의 CaF2를 이용하여 절연막을 생성시킴으로써 우수한 계면상태와 양질의 게이트 절연층을 얻을 수 있어서 TFT의 특성을 개선시킬 수 있다.A method of manufacturing an insulating film for a thin film transistor for producing an insulating film using an fluoride film-based element to obtain an excellent interface state and a good gate insulating layer is disclosed. After forming a vacuum state of 10 -6 torr or less by using liquid nitrogen, at least one insulating film is formed on the semiconductor substrate using 3 to 5 mm, 99.95% of a fluoride film-based element as a deposition source. According to the present invention, an excellent interfacial state and a high quality gate insulating layer can be obtained by forming an insulating film using a silicon fluoride-based CaF 2, which is capable of growing a silicon thin film and a heterogeneous epitaxial layer and does not contain oxygen, thereby improving TFT characteristics. You can.

Description

박막 트랜지스터용 절연막의 제조방법{A method for manufacturing insulator for TFT}A method for manufacturing insulator for TFT

본 발명은 박막 트랜지스터에 관한 것으로 특히, 불화막 계열의 원소를 이용하여 절연막을 생성시킴으로써 우수한 계면상태와 양질의 게이트 절연층을 얻을 수 있도록 하기 위한 박막 트랜지스터용 절연막의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor, and more particularly, to a method of manufacturing an insulating film for a thin film transistor, in order to obtain an excellent interface state and a high quality gate insulating layer by forming an insulating film using a fluoride film-based element.

일반적으로 박막 트랜지스터(Thin Film Transistor; 이하 TFT)는 저소비 전력, 고화질, 평판, 경량등의 특징이 있기 때문에 CRT(cathod ray tube)의 사용에는 그 한계가 있는 전자수첩, 펜입력 컴퓨터 등의 휴대용의 정보 단말기와 워드프로세서, 노트북 PC, 워크스테이션 OA 등의 흑백 및 컬러 LCD 그리고 휴대용 TV, 벽걸이 TV, 컬러 LCD, 고품위 TV(high definition television)등의 다양한 상품의 핵심 부품으로 응용되고 있다.In general, thin film transistors (TFTs) are characterized by low power consumption, high image quality, flat panel, and light weight, so that the use of CRTs (cathod ray tubes) has limitations. It is applied as a core component of various products such as black and white and color LCDs such as information terminals, word processors, notebook PCs, and workstation OAs, and portable TVs, wall-mounted TVs, color LCDs, and high definition televisions.

이와 같은 TFT는 도 1에서 보는 바와 같이, 기판(10)상에 게이트전극(20)이 형성되고, 게이트 전극(20)을 포함하는 기판(10)전면에 절연막(30)이 형성된다. 절연막(30)상에 게이트 전극(20)과 대향하는 위치에 비정질 실리콘박막으로 이루어지는 반도체층(40)이 형성된다. 반도체층(40)상면에는 채널부(50)의 상면이 노출되도록 소오스/드레인전극(60/65)이 형성된 구성을 지닌다.As shown in FIG. 1, the TFT has a gate electrode 20 formed on the substrate 10, and an insulating film 30 formed on the entire surface of the substrate 10 including the gate electrode 20. A semiconductor layer 40 made of an amorphous silicon thin film is formed on the insulating film 30 at a position opposite to the gate electrode 20. The source / drain electrodes 60/65 are formed on the upper surface of the semiconductor layer 40 so that the upper surface of the channel part 50 is exposed.

이와 같은 종래의 TFT에서는 반도체층(40)을 이루는 실리콘 박막으로 a-Si:H가 사용되었으며 절연막(30)으로는 산화막 계열의 SiO2, SiN:H, SiNxOy, Al2O3등의 을 사용되었다.In the conventional TFT as described above, a-Si: H is used as the silicon thin film constituting the semiconductor layer 40, and as the insulating film 30, oxide-based SiO 2 , SiN: H, SiN x O y , Al 2 O 3, etc. Was used.

그러나, 종래의 TFT에서 실리콘 박막에 사용되던 a-Si:H 박막은 수소를 10 at % 이상을 포함하고 있기 때문에 SiO2절연막과 실리콘 박막 계면에서의 O-H 결합으로 계면밀도를 증가시킨다. 따라서,실리콘 박막과 절연막과의 큰 계면 결합 밀도(> 1011cm·2eV-1)로 인하여 누설전류가 증가하고 ION/IOFF비가 저하되며 고정 및 이동 전하밀도가 높은 문제점이 있었다.However, since the a-Si: H thin film used in the silicon thin film of the conventional TFT contains 10 at% or more of hydrogen, the interfacial density is increased by the OH bond between the SiO 2 insulating film and the silicon thin film interface. Therefore, due to the large interfacial bonding density (> 10 11 cm · 2 eV -1 ) between the silicon thin film and the insulating film, the leakage current increases, the I ON / I OFF ratio decreases, and fixed and mobile charge densities are high.

본 발명은 상기와 같은 문제점을 해소하기 위하여 발명된 것으로, 결정 구조가 실리콘과 같은 큐빅구조이고 격자 상수도 0.5464로 실리콘과 거의 유사하며 격자 부정합률이 0.6%로 실리콘과 이종에피가 성장가능한 불화막 계열의 CaF2를 이용하여 절연막을 생성시킴으로써 우수한 계면상태와 양질의 게이트 절연층을 얻을 수 있어서 TFT의 특성을 개선하도록 하기 위한 박막 트랜지스터용 절연막의 제조방법을 제공하는 데 그 목적이 있다.The present invention has been invented to solve the above problems, and the fluorine film series has a crystal structure of a cubic structure such as silicon, a lattice constant of 0.5464, which is almost similar to that of silicon, and has a lattice mismatch rate of 0.6%. It is an object of the present invention to provide a method for producing an insulating film for a thin film transistor for improving the characteristics of a TFT by obtaining an excellent interfacial state and a good gate insulating layer by forming an insulating film using CaF 2 .

상기와 같은 목적을 수행하기 위한 본 발명은, 액체 질소를 이용하여 10-6torr 이하의 진공상태를 형성한 다음, 증착원으로 3∼5mm, 99.95%의 불화막 계열의 원소를 이용하여 반도체 기판상에 적어도 1층의 절연막을 형성시킨다.The present invention for achieving the above object, by using a liquid nitrogen to form a vacuum state of 10 -6 torr or less, and then using a semiconductor substrate of 3 to 5mm, 99.95% fluoride film-based element as a deposition source At least one insulating film is formed on the substrate.

본 발명의 바람직한 실시에에 따르면 불화막 계열의 원소로는 CaF2가 사용된다.According to a preferred embodiment of the present invention, CaF 2 is used as the fluorinated film-based element.

본 발명은 실리콘 박막과 이종에피가 성장가능하고, 산소를 포함하고 있지 않은 불화막 계열의 CaF2를 이용하여 절연막을 생성시킴으로써 우수한 계면상태와 양질의 게이트 절연층을 얻을 수 있어서 TFT의 특성을 개선시킬 수 있다.According to the present invention, an excellent interfacial state and a high quality gate insulating layer can be obtained by forming an insulating film using a silicon fluoride-based CaF 2, which is capable of growing a silicon thin film and a heterogeneous epitaxial layer and does not contain oxygen, thereby improving TFT characteristics. You can.

이하 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

본 발명에 따른 TFT의 구조는 도 1과 같다. 즉, 기판(100)상에 게이트전극(200)이 형성되고, 게이트 전극(200)을 포함하는 기판(100)전면에 절연막(300)이 형성된다. 절연막(300)상에 게이트 전극(200)과 대향하는 위치에 비정질 실리콘박막으로 이루어지는 반도체층(400)이 형성된다. 반도체층(400)상면에는 채널부(500)의 상면이 노출되도록 소오스/드레인전극(600/650)이 형성된 구성을 지닌다.The structure of the TFT according to the present invention is shown in FIG. That is, the gate electrode 200 is formed on the substrate 100, and the insulating film 300 is formed on the entire surface of the substrate 100 including the gate electrode 200. A semiconductor layer 400 made of an amorphous silicon thin film is formed on the insulating layer 300 at a position opposite to the gate electrode 200. The source / drain electrodes 600/650 are formed on the upper surface of the semiconductor layer 400 so that the upper surface of the channel part 500 is exposed.

여기서, 절연막(300)은 불화막 계열의 CaF2를 이용하여 형성한다. 즉, MBE(Molecular bearn epitaxy), 화학기상증착(Chemical vapor deposition;CVD) 및 증착(Evaporation)방식을 이용하여 유리, 플라스틱 및 실리콘등 다양한 기판상에 절연막을 성장시킬 수 있으나, 본 발명에서는 Evaporation방식을 이용하여 기판상에 절연막을 성장시킨다. 즉, 액체 질소를 냉매로 이용하여 10-6torr 이하의 진공상태를 형성한 다음 증착원으로 3∼5mm, 99.95%의 piece형태의 CaF2를 증착시킨다.Here, the insulating film 300 is formed using CaF 2 of fluoride film series. That is, an insulating film can be grown on various substrates such as glass, plastic, and silicon by using a molecular bearn epitaxy (MBE), chemical vapor deposition (CVD), and evaporation, but in the present invention, the evaporation method Using to grow an insulating film on the substrate. That is, using a liquid nitrogen as a refrigerant to form a vacuum state of 10 -6 torr or less, and then deposited as a deposition source of 3 ~ 5mm, 99.95% piece of CaF 2 piece.

냉매인 액체질소를 이용하여 10-6torr이하의 진공상태를 형성하는 구체적인 방법은 도 2에서 보는 바와 같이, 액체질소(N2 gas)를 챔버(chamber)의 아래에 위치한 액체주입부에 주입을 하게 되면, 액체질소가 주입되는 부분의 온도가 떨어지게 되고, 온도가 떨어짐으로써 압력 또한 같이 낮아지게 된다. 즉, 액체질소가 주입됨으로서, 챔버의 압력도 챔버의 하부에 위치한 액체주입부의 압력과 동일하게 낮아짐으로써 챔버의 압력이 10-6Torr가 되는 진공 상태로 된다.As a specific method of forming a vacuum state of 10 −6 torr or less by using liquid nitrogen as a refrigerant, as shown in FIG. 2, N 2 gas may be injected into a liquid injection unit located below the chamber. As a result, the temperature of the portion where the liquid nitrogen is injected falls, and as the temperature drops, the pressure also decreases. That is, by injecting liquid nitrogen, the pressure in the chamber is also lowered to be equal to the pressure of the liquid inlet located at the bottom of the chamber, so that the pressure in the chamber is in a vacuum state of 10 −6 Torr.

그리고, CaF2의 급격한 증착을 억제하고 일정한 두께의 박막을 제조하기 위하여 baffuled furnace형태의 Mo boat가 사용된다. 또한, 본 발명은 다른 증착원 즉, 산소를 포함하고 있지 않은 불화막 계열의 BaF2, SrF2 및 LaF3등이 증착원들로 사용될 수 있다.In addition, a baffuled furnace-type Mo boat is used to suppress the sudden deposition of CaF 2 and to produce a thin film of a constant thickness. The invention may also include other deposition source that is, the fluoride film BaF series that does not contain oxygen 2, SrF 2 and LaF 3 can be used as the evaporation source.

본 발명에 따른 불화막 계열의 CaF2 절연막은 결정 구조가 실리콘과 같은 큐빅구조이고 격자 상수도 0.5464로 실리콘과 거의 유사하며 격자 부정합률이 0.6%로 실리콘과 이종에피가 성장가능하다. 따라서, 종래의 TFT에서 실리콘 박막에 사용되던 a-Si:H 박막이 수소를 10 at % 이상을 포함하고 있기 때문에 SiO2절연막과 실리콘 박막 계면에서의 O-H 결합으로 큰 계면 결합 밀도(1011cm·2 eV-1이상)를 가짐으로써 높은 누설전류와 낮은 ION/IOFF비율을 가지는 것에 반하여, 계면상태의 개선으로 ION/IOFF(106이하)비율을 증가시키고, 누설전류는 10-8A/cm·2이하로 줄일 수 있다.The fluorine-based CaF 2 insulating film according to the present invention has a crystal structure of silicon-like cubic structure, a lattice constant of 0.5464, which is almost similar to that of silicon, and a lattice mismatch rate of 0.6%. Therefore, that was used in the silicon thin film in the conventional TFT a-Si: H thin film, since it contains the hydrogen 10 at% or more large interfacial link density as OH bonds in the SiO 2 insulating film and the silicon thin film surface (10 11 cm · 2 by having a -1 eV or more) as opposed to having a high leakage current and low I oN / I OFF ratio, the improvement of the interface states increase the I oN / I OFF (10 6 or less) ratio and the leakage current is 10 - 8 a / cm · can be reduced to 2 or less.

또한, 본 발명에 따른 불화막 계열의 CaF2 절연막은 고온에서도 안정한 절연 물질이므로 a-Si:H TFT 응용 뿐만 아니라 poly-Si TFT 에도 사용하여 빠른속도 및 구동회로를 동일 기판상에 구현할 수 있다.In addition, since the fluoride film-based CaF 2 insulating film according to the present invention is a stable insulating material even at high temperature, it is possible to implement a high speed and a driving circuit on the same substrate by using not only a-Si: H TFT but also poly-Si TFT.

상술한 바와 같이 본 발명은 실리콘 박막과 이종에피가 성장가능한 불화막 계열의 CaF2를 이용하여 절연막을 생성시킴으로써 우수한 계면상태와 양질의 게이트 절연층을 얻을 수 있어서 TFT의 특성을 개선시킬 수 있는 효과가 있다.As described above, the present invention produces an insulating film using a silicon thin film and a fluoride film-based CaF 2 capable of growing heterogeneous epitaxial layers, thereby obtaining an excellent interfacial state and a high quality gate insulating layer, thereby improving TFT characteristics. There is.

이상에서 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하였으나, 본 발명은 이에 한정되는 것이 아니며 본 발명의 기술적 사상의 범위내에서 당업자에 의해 그 개량이나 변형이 가능하다.Although the preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and may be improved or modified by those skilled in the art within the scope of the technical idea of the present invention.

도 1은 일반적인 박막 트랜지스터의 구성을 보여주기 위한 단면도이다.1 is a cross-sectional view illustrating a configuration of a general thin film transistor.

도 2는 액체질소를 이용하여 진공상태를 형성하는 것을 설명하기 위한 개략도이다.2 is a schematic diagram for explaining the formation of a vacuum state using liquid nitrogen.

〈도면의 주요부분에 대한 부호의 설명><Explanation of symbols for main parts of the drawings>

100 : 기판 200 : 게이트 전극100 substrate 200 gate electrode

300 : 절연막 400 : 반도체층300: insulating film 400: semiconductor layer

500 : 채널부 600 : 소오스 전극500: channel portion 600: source electrode

650 : 드레인 전극650 drain electrode

Claims (2)

액체 질소를 이용하여 10-6torr 이하의 진공상태를 형성한 다음, 증착원으로 3∼5mm, 99.95%의 불화막 계열의 원소를 이용하여 반도체 기판(100)상에 적어도 1층의 절연막을 형성시키는 박막 트랜지스터용 절연막의 제조방법.After forming a vacuum state of 10 -6 torr or less by using liquid nitrogen, at least one insulating film is formed on the semiconductor substrate 100 by using 3 to 5 mm, 99.95% of a fluoride film-based element as a deposition source. A method of manufacturing an insulating film for a thin film transistor. 제 1항에 있어서, 상기 불화막 계열의 원소는 CaF2인 것을 특징으로 하는 박막 트랜지스터용 절연막의 제조방법.The method of claim 1, wherein the fluoride film-based element is CaF 2 .
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0336767A (en) * 1989-07-04 1991-02-18 Seiko Epson Corp Manufacture of semiconductor device
JPH03280471A (en) * 1990-03-28 1991-12-11 Sharp Corp Manufacture of semiconductor device
JPH05251704A (en) * 1992-03-05 1993-09-28 Fujitsu Ltd Thin-film transistor
KR19980065168A (en) * 1997-01-03 1998-10-15 장진 Thin film transistor using fluorine-containing oxide film as gate insulating film and manufacturing method thereof
KR19990021577A (en) * 1997-08-30 1999-03-25 김영환 Thin Film Transistor Manufacturing Method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0336767A (en) * 1989-07-04 1991-02-18 Seiko Epson Corp Manufacture of semiconductor device
JPH03280471A (en) * 1990-03-28 1991-12-11 Sharp Corp Manufacture of semiconductor device
JPH05251704A (en) * 1992-03-05 1993-09-28 Fujitsu Ltd Thin-film transistor
KR19980065168A (en) * 1997-01-03 1998-10-15 장진 Thin film transistor using fluorine-containing oxide film as gate insulating film and manufacturing method thereof
KR19990021577A (en) * 1997-08-30 1999-03-25 김영환 Thin Film Transistor Manufacturing Method

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