KR100480578B1 - Method for mos transistor fabrication having source/drain area upon field oxide - Google Patents

Abstract

A method of manufacturing a MOS transistor having a similar silicon on insulator (SOI) substrate structure in which a source / drain is formed on a field oxide film to suppress leakage current of a junction part due to metal diffusion is disclosed. To this end, the present invention provides a method of forming a field oxide film for trench isolation in a semiconductor substrate, forming a first silicon layer pattern extending to a predetermined area of a field oxide film on an active region defined by a field oxide film, and Performing heat treatment on the resultant silicon layer to recrystallize the first silicon layer to form a second silicon layer pattern, forming a gate oxide layer on the second silicon layer pattern, and forming a gate electrode and a gate on the gate oxide layer Forming a spacer, and forming a source / drain on the gate electrode and the second silicon layer pattern under the both sides of the gate spacer; and forming a source / drain on the field oxide layer. do. The excitation field oxide film may be formed by a LOCOS element isolation process.

Description

Method for manufacturing MOS transistor to form source / drain on field oxide film {Method for MOS transistor fabrication having source / drain area upon field oxide}

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to pseudo S. Five. The present invention relates to a MOS transistor having a silicon on insulator (SOI) substrate structure and a method of manufacturing the same.

In recent years, the channel length of a metal oxide semiconductor (MOS) transistor which is inevitably accompanied by high integration of semiconductor devices has been reduced exponentially. As the channel length of the transistor is reduced, pinch through and short channel effects occur in the channel region under the gate, thereby degrading the characteristics of the transistor. Making MOS transistors with shallow junctions with reduced source and drain junctions has become a very important problem. A problem in forming a MOS transistor having a shallow junction is that metal is diffused in the process of connecting a metal, which is a conductive layer, to one junction to cause leakage current at the junction. Such a problem s. Five. This can be solved by forming a MOS transistor using an SOI substrate. However, in terms of shallow junction, after the device isolation process without using the SOI substrate separately, the selective epitaxial growth (SEG) or solid phase epitaxy (Solid Phase) Epitaxy; SPE, hereinafter referred to as SPE). Five. Making a silicon on insulator (SOI) substrate is more advantageous for forming MOS transistors.

1 to 5 are cross-sectional views illustrating a method of forming a MOS transistor having a similar SOI substrate structure according to the prior art.

Referring to FIG. 1, after the insulating film is deposited on the semiconductor substrate 10, patterning is performed to form the insulating film pattern 30, thereby forming a hole H exposing a predetermined region of the semiconductor substrate 10. The hole is filled with single crystal silicon in a subsequent process to become a contact region between the semiconductor substrate 10 and the film formed on the insulating film.

Referring to FIG. 2, the silicon atoms of the semiconductor substrate 10 exposed by the holes H are seeded and grown in a SEG manner to form a single crystal silicon film thickly covering the insulating film pattern 30. Subsequently, a chemical mechanical polishing (CMP) process is performed on the single crystal silicon film 50 until the surface of the insulating film pattern 30 is exposed so that the single crystal silicon film fills the hole H.

Referring to FIG. 3, after depositing and patterning an amorphous silicon layer (not shown) on the single crystal silicon film, the annealing process is performed at a temperature of 500 to 600 ° C. to recrystallize the amorphous silicon layer. The single crystal silicon layer 70 is formed by the SPE method covering the predetermined region of the insulating film pattern 30 while filling the holes H.

Referring to FIG. 4, the single crystal silicon layer 70 by the SPE method is regrown as a seed by the SEG method to pattern the single crystal silicon pattern 90 connected to the semiconductor substrate 10.

Referring to FIG. 5, a sectional view of the MOS transistor 95 is formed by performing a transistor forming process according to a conventional method on the single crystal silicon pattern 90.

However, in the aforementioned prior art, the method of growing single crystal silicon (SEG) to make a similar SOI substrate has a manufacturing problem in which the process is complicated, difficult and expensive.

SUMMARY OF THE INVENTION The present invention provides a method of manufacturing a MOS transistor that forms a source / drain on a field oxide film by forming a similar SOI substrate using only a heat treatment method (SPE) after stacking amorphous silicon without growing a silicon single crystal. It is.

In order to achieve the above technical problem, the present invention provides a method of forming a field oxide film for trench isolation in a semiconductor substrate, and extending to a predetermined region of the field oxide film on an active region defined by the field oxide film. Forming a first silicon layer pattern, performing a heat treatment on the resultant product on which the first silicon layer is formed, and recrystallizing the first silicon layer to form a second silicon layer pattern, and on the second silicon layer pattern Forming a gate oxide layer, forming a gate electrode and a gate spacer on the gate oxide layer, and forming a source / drain in the second silicon layer pattern under both sides of the gate electrode and the gate spacer. Manufacturing method of MOS transistor which forms source / drain on field oxide film It provides.

According to a preferred embodiment of the present invention, it is preferable that the width of the gate electrode and the gate spacer is larger than the width of the active region, and the source / drain is formed in the second silicon layer pattern on the field oxide layer. Suitable.

Preferably, the first silicon layer pattern is suitably formed using amorphous silicon, and for recrystallization in the heat treatment step of recrystallizing the first silicon layer pattern made of the amorphous silicon to form a second silicon layer pattern. It is suitable to use a silicon atom in the active region as a seed.

On the other hand, after forming the field oxide film by the trench device isolation, it is preferable to perform the step of planarizing the surface of the semiconductor substrate by a method such as chemical mechanical polishing.

In accordance with another aspect of the present invention, there is provided a method of forming a field oxide film for separating a LOCOS device on a semiconductor substrate, and forming a field oxide film on an active region defined by the field oxide film. Forming a first silicon layer pattern extending to an area, performing a heat treatment on a resultant product on which the first silicon layer is formed, and recrystallizing the first silicon layer to form a second silicon layer pattern; Forming a gate oxide layer on the silicon layer pattern, forming a gate electrode and a gate spacer on the gate oxide layer, and forming a source / drain on the second silicon layer pattern under both sides of the gate electrode and the gate spacer. A MOS transistor for forming a source / drain on the field oxide film, comprising: Provide corrective measures.

According to a preferred embodiment of the present invention, it is preferable that the width of the gate electrode and the gate spacer is larger than the width of the active region, and the source / drain is formed in the second silicon layer pattern on the field oxide layer. Suitable.

Preferably, the first silicon layer pattern is suitably formed using amorphous silicon, and for recrystallization in the heat treatment step of recrystallizing the first silicon layer pattern made of amorphous silicon to form a second silicon layer pattern. It is suitable to use a silicon atom in the active region as a seed.

On the other hand, after forming the field oxide film by the LOCOS device separation, it is preferable to perform the step of planarizing the surface of the semiconductor substrate by a method such as chemical mechanical polishing.

According to the present invention, by making a similar SOI substrate structure and forming a MOS transistor where the source / drain is located on the field oxide layer without using the SEG process of regrowing silicon, it is possible to reduce manufacturing costs and simplify complex process steps. The leakage current caused by the metal generated at the shallow junction of the MOS transistor can be suppressed.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The structure of the transistor in this specification is used in a general sense and does not limit the specific structure as shown in the drawings. Therefore, the content described in the following preferred embodiments is exemplary and not intended to be limiting.

First embodiment

6 to 10 are cross-sectional views illustrating a method of manufacturing a MOS transistor in which a source / drain is formed on a field oxide film according to the first embodiment of the present invention.

Referring to FIG. 6, a mask pattern (not shown) for forming a trench is formed in the semiconductor substrate 100, and etching is performed to etch a portion of the semiconductor substrate 100 to form a trench 101. .

Referring to FIG. 7, a field oxide film 104 is formed in the semiconductor substrate 100 on which the trench is formed. Subsequently, a buffer oxide layer for thermal oxidation is formed in the trench 101, and an oxide film by chemical vapor deposition (CVD) is stacked to sufficiently fill the trench. Subsequently, the semiconductor substrate on which the CVD oxide film is formed is planarized by using a chemical mechanical polishing (CMP) process or the like.

Referring to FIG. 8, a first silicon layer (not shown) made of amorphous silicon is formed on a resultant in which the field oxide layer 104 is formed, and patterning is performed through photo and etching to form a first silicon layer pattern 106. do.

9, a first silicon layer pattern is formed by seeding silicon atoms in an active region by performing an annealing process of 500 to 600 ° C. on a semiconductor substrate on which the first silicon layer pattern 106 is formed. The amorphous silicon of is monocrystallized to form the second silicon layer pattern 108. Subsequently, a thermal oxidation process is performed to form a gate oxide layer 110 of the transistor on the second silicon layer pattern 108.

Referring to FIG. 10, a gate layer 112 is formed by stacking a conductive layer such as polysilicon on a semiconductor on which the gate oxide film 110 is formed and patterning the same. Subsequently, an insulating film for a gate spacer is deposited on the semiconductor substrate on which the gate electrode 112 is formed, and anisotropic etching is performed to form gate spacers 114 on both sidewalls of the gate electrode 112. Lastly, an ion implantation process is performed on the gate electrode 112 and the gate spacer 114 using an ion implantation mask to form second silicon layer patterns 108 under both sides of the gate electrode 112 and the gate spacer 114. By forming the source / drain regions in Fig. 1), the manufacturing process of the MOS transistor for forming the source / drain on the field oxide film according to the first embodiment of the present invention is completed.

Here, since the width A of the active region is smaller than the width B of the sum of the gate electrode 112 and the gate spacer 114, the source / drain regions formed by the ion implantation are formed on the field oxide film 104. 2 silicon layer pattern 108 to be formed. Therefore, even when diffusion of the metal occurs in the process of connecting the metal in a subsequent process, the field oxide film 104 serves to block it, thereby preventing the occurrence of junction leakage.

Second embodiment

11 to 15 are cross-sectional views illustrating a method of manufacturing a MOS transistor in which a source / drain is formed on a field oxide film according to the second embodiment of the present invention.

A method for manufacturing a MOS transistor for forming a source / drain on the field oxide film described in the second embodiment of the present invention is to provide a method for forming a MOS transistor over the field oxide film described in the first embodiment. The same is true except for the manufacturing method and device isolation process. That is, in the first embodiment, the field oxide film is formed by the trench device isolation method. In the second embodiment, the field oxide film is formed through the LOCOS device isolation process. Since the processes which proceed after that are all the same, the description is omitted to avoid duplication. In addition, all the reference numerals described in the second embodiment are configured to correspond to the first embodiment to help understanding.

The present invention is not limited to the above embodiments, and it is apparent that many modifications can be made by those skilled in the art within the technical spirit to which the present invention belongs.

Therefore, according to the present invention described above, a MOS transistor in which a similar SOI substrate structure is formed using only the SPE method of heat-treating amorphous silicon to form a single crystal silicon layer without using the SEG process of regrowing silicon and the source / drain is positioned on the field oxide film By forming a, first, the manufacturing cost can be reduced, and second, the complicated process steps can be simplified, and third, the leakage current caused by the metal occurring at the shallow junction of the MOS transistor can be suppressed.

1 to 5 are cross-sectional views illustrating a method of forming a MOS transistor having a similar SOI substrate structure according to the prior art.

6 to 10 are cross-sectional views illustrating a method of manufacturing a MOS transistor in which a source / drain is formed on a field oxide film according to the first embodiment of the present invention.

11 to 15 are cross-sectional views illustrating a method of manufacturing a MOS transistor in which a source / drain is formed on a field oxide film according to the second embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: semiconductor substrate, 101: trench,

102: active region, 104: field oxide film,

106: a first silicon layer pattern, 108: a second silicon layer pattern,

110: gate oxide film, 112: gate electrode,

114: gate spacer.

Claims (12)

Forming a field oxide layer for trench isolation on a semiconductor substrate; Forming a first silicon layer pattern of an amorphous silicon material extending to a predetermined region of the field oxide film on the active region defined by the field oxide film; Performing a heat treatment on the resultant product on which the first silicon layer is formed to recrystallize the first silicon layer to form a second silicon layer pattern; Forming a gate oxide layer on the second silicon layer pattern; Forming a gate electrode and a gate spacer on the gate oxide layer; And And forming a source / drain on the second silicon layer pattern under both sides of the gate electrode and the gate spacer. The method of claim 1, The width of the gate electrode and the gate spacer is formed larger than the width of the active region forming a source / drain on the field oxide film MOS transistor manufacturing method. The method of claim 1, And forming the source / drain on the field oxide layer, wherein the source / drain is formed in a second silicon layer pattern on the field oxide layer. The method of claim 1, Forming a source / drain on the field oxide layer using silicon atoms in the active region as a seed for recrystallization in the heat treatment step of recrystallizing the first silicon layer pattern to form a second silicon layer pattern Method of manufacturing MOS transistor. The method of claim 1, And forming a source / drain on the field oxide film, further comprising planarizing a surface of the semiconductor substrate after forming the field oxide film by the trench device isolation. The method of claim 5, And planarizing the semiconductor substrate is performed by chemical mechanical polishing (CMP) to form a source / drain on the field oxide film. Forming a field oxide layer for separating LOCOS devices on a semiconductor substrate; Forming a first silicon layer pattern of an amorphous silicon material extending to a predetermined region of the field oxide film on the active region defined by the field oxide film; Performing a heat treatment on the resultant product on which the first silicon layer is formed to recrystallize the first silicon layer to form a second silicon layer pattern; Forming a gate oxide layer on the second silicon layer pattern; Forming a gate electrode and a gate spacer on the gate oxide layer; And And forming a source / drain on the second silicon layer pattern under both sides of the gate electrode and the gate spacer. The method of claim 7, wherein The width of the gate electrode and the gate spacer is formed larger than the width of the active region forming a source / drain on the field oxide film MOS transistor manufacturing method. The method of claim 7, wherein And forming the source / drain on the field oxide layer, wherein the source / drain is formed in a second silicon layer pattern on the field oxide layer. The method of claim 7, wherein Forming a source / drain on the field oxide layer using silicon atoms in the active region as a seed for recrystallization in the heat treatment step of recrystallizing the first silicon layer pattern to form a second silicon layer pattern Method of manufacturing MOS transistor. The method of claim 7, wherein After forming the field oxide film by the LOCOS isolation, the method of manufacturing a MOS transistor for forming a source / drain on the field oxide film further comprises planarizing the surface of the semiconductor substrate. . The method of claim 11, And planarizing the semiconductor substrate is performed by chemical mechanical polishing (CMP) to form a source / drain on the field oxide film.

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