KR100393197B1 - Ferroelectric capacitor and manufacturing method thereof - Google Patents

Ferroelectric capacitor and manufacturing method thereof Download PDF

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KR100393197B1
KR100393197B1 KR1019960051828A KR19960051828A KR100393197B1 KR 100393197 B1 KR100393197 B1 KR 100393197B1 KR 1019960051828 A KR1019960051828 A KR 1019960051828A KR 19960051828 A KR19960051828 A KR 19960051828A KR 100393197 B1 KR100393197 B1 KR 100393197B1
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pzt
thickness
ferroelectric
electrode
ferroelectric capacitor
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KR19980031956A (en
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김태영
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삼성전자주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE: A ferroelectric capacitor and a method for manufacturing the same are provided to improve electrical characteristics by using interfacial engineering technique. CONSTITUTION: A titanium film having the thickness of 50Å below as a glue layer is deposited on a Si/SiO2 substrate. A platinum film having the thickness of 700Å below as a lower electrode is deposited on the titanium film. A PZT film as a ferroelectric film is deposited on the lower electrode. Then, an upper electrode is formed on the ferroelectric film.

Description

강유전체 캐패시터 및 그 제조 방법Ferroelectric Capacitors and Manufacturing Method Thereof

본 발명은 계면 공학(interfacial engineering)적 방법을 이용하여 전극막과 강유전체의 물성을 변화시켜 그 전기적 특성이 개선된 강유전체 캐패시터 및 그 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ferroelectric capacitor having improved electrical properties by changing physical properties of an electrode film and a ferroelectric by using an interfacial engineering method, and a manufacturing method thereof.

μ 사용되는 백금(3)은, 도 1에 도시된 바와 같이, 스퍼터링에 의해 SiO2(1)에 대한 접착층인 타이타늄(Ti)층 위에 증착된다. 이 때 백금층(3)의 두께는 에칭시의 안정성을 확보하기 위해 도 2에 도시된 바와 같이, 2700Å이상을 사용하는 것이 보통이고, 이러한 기판(1)은 유기 금속 화학 기상 증착법(MOCVD; metal organic chemical vapor deposition)으로 PZT박막(4)을 증착하는 경우에도 사용되고 있다. 1995년 "Integrated Ferroelectrics(Vol.8.pp.89-98)"에 발표된 NEC의 자료에서는 졸-겔(sol-gel)법에 의해 PZT 막을 형성하였으나 하부 전극인 백금의 두께를 3000Å, 타이타늄의 두께를 500Å으로 사용하고 있다. 필립스에서 93년 "Integrated Ferroelectrics(Vol.3.pp.283-292)"에서 발표한 자료에서는 700Å의 백금을 사용하였으나 이 것도 역시 그 위에 졸-겔법에 의해 PZT 박막을 형성하였고, 기판을 어닐링(annealing)하여 힐록(hillock)을 형성시킴으로써, 표면을 더욱 거칠게하여 오히려 유기 금속 화학 기상 증착법의 경우에는 좋지 못한 효과를 나타낼 수 있는 결과를 보이고 있다. 이러한 2500Å 이상의 두께의 백금층 위에서 perovskite 상의 PZT를 형성하기 위해 600℃ 이상의 고온에서 유기 금속 화학 기상 증착법으로 증착하는 경우 PZT박막의 거칠기는 0.1μm 정도로 매우 심각하게 문제가 된다. 따라서, 이와 같이 거칠은 PZT 박막 상에 상부 전극 증착 등의 후속 공정을 진행하기가 어려워진다. 한편, PZT 박막의 거칠기를 개선하기 위해 증착 온도를 낮추는 방법도 가능하나, 이 경우에는 perovskite phase PZT 박막 자체를 형성하는 것이 매우 어려워진다.The platinum 3 used is deposited on the titanium (Ti) layer, which is an adhesive layer to SiO 2 (1) by sputtering, as shown in FIG. At this time, the thickness of the platinum layer (3) is usually used as shown in Figure 2, in order to ensure the stability during etching, it is common to use the substrate 1 is an organic metal chemical vapor deposition (MOCVD; metal) It is also used in the case of depositing the PZT thin film 4 by organic chemical vapor deposition. In 1995, published in "Integrated Ferroelectrics (Vol.8.pp.89-98)", the NEC data showed that PZT film was formed by sol-gel method. The thickness is used at 500Å. Philips published in 1993 "Integrated Ferroelectrics (Vol.3.pp.283-292)" used 700 백 of platinum, which also formed a PZT thin film by the sol-gel method and annealed the substrate. By annealing to form a hillock, the surface is more roughened, and in the case of the organometallic chemical vapor deposition method, there is a result that can exhibit a bad effect. When deposited by an organometallic chemical vapor deposition method at a high temperature of 600 ° C. or more to form PZT on a perovskite on a platinum layer having a thickness of 2500 GPa or more, the roughness of the PZT thin film is very seriously about 0.1 μm. Therefore, it becomes difficult to proceed with subsequent processes such as upper electrode deposition on the rough PZT thin film. On the other hand, it is possible to reduce the deposition temperature in order to improve the roughness of the PZT thin film, in which case it is very difficult to form the perovskite phase PZT thin film itself.

일례로서, 도 3은 백금 두께 2700Å, 타이타늄 두께 300Å으로 형성된 하부 전극 위에 MOCVD법으로 형성된 PZT 박막의 X-ray 패턴을 나타내고 있다. 여기서, 2차상에 해당하는 피크들과 perovskite phase의 PZT가 함께 섞여 있음을 나타내고 있다. 또한, (111) PZT 피크는 상대적으로 그 세기가 약함을 알 수 있다.As an example, FIG. 3 shows an X-ray pattern of a PZT thin film formed by a MOCVD method on a lower electrode formed with a platinum thickness of 2700 mm 3 and a titanium thickness of 300 mm 3. Here, the peaks corresponding to the secondary phase and the PZT of the perovskite phase are mixed together. In addition, it can be seen that the (111) PZT peak is relatively weak in intensity.

본 발명은 상기와 같은 문제점을 개선하고자 창안된 것으로, 백금층 상에 perovskite phase PZT 박막이 증착된 강유전체 캐패시터 및 MOCVD법을 이용하여 용이하게 백금층 상에 perovskite phase PZT 박막을 형성하는 방법을 제공하는데 그 목적이 있다.The present invention was devised to improve the above problems, and provides a ferroelectric capacitor on which a perovskite phase PZT thin film is deposited on a platinum layer and a method of easily forming a perovskite phase PZT thin film on a platinum layer by using a MOCVD method. The purpose is.

도 1은 종래의 강유전체 캐패시터의 수직 단면도,1 is a vertical cross-sectional view of a conventional ferroelectric capacitor,

도 2는 도 1의 강유전체 캐패시터의 하부 전극의 물성을 개념적으로 설명하기 위한 설명도,2 is an explanatory diagram for conceptually explaining the physical properties of the lower electrode of the ferroelectric capacitor of FIG.

도 3은 도 2의 강유전체 캐패시터에 있어서, Pt(2700Å)/Ti(300Å) 하부 전극 상에 MOCVD법으로 형성된 PZT의 X-ray 회절 패턴,3 is an X-ray diffraction pattern of PZT formed by MOCVD on a Pt (2700 mV) / Ti (300 mV) lower electrode in the ferroelectric capacitor of FIG.

도 4는 본 발명에 따른 강유전체 캐패시터의 하부 전극(거칠기가 개선됨)의 물성을 개념적으로 설명하기 위한 설명도,4 is an explanatory diagram for conceptually explaining the physical properties of the lower electrode (roughness is improved) of the ferroelectric capacitor according to the present invention;

도 5는 도 4의 강유전체 캐패시터에 있어서, Pt(700Å)/Ti(50Å) 하부 전극 상에 MOCVD법으로 형성된 PZT의 X-ray 회절 패턴.FIG. 5 is an X-ray diffraction pattern of PZT formed by MOCVD on a Pt (700 kV) / Ti (50 kV) lower electrode in the ferroelectric capacitor of FIG.

그리고 도 6은 도 4의 강유전체 캐패시터에 있어서, Pt(700Å)/Ti(50Å) 하부 전극 상에 MOCVD법으로 형성된 PZT의 히스테리시스 특성 곡선이다.6 is a hysteresis characteristic curve of PZT formed by the MOCVD method on the Pt (700 kV) / Ti (50 kV) lower electrode in the ferroelectric capacitor of FIG.

<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>

1. SiO2/Si 기판 2. Ti 접착층1. SiO 2 / Si substrate 2. Ti adhesive layer

3. Pt 하부 전극 4. PZT 강유전체3. Pt bottom electrode 4. PZT ferroelectric

5. Pt 상부 전극5. Pt upper electrode

상기와 같은 목적을 달성하기 위하여 본 발명에 따른 강유전체 캐패시터는, Si/SiO2기판 상에 하부 Pt 전극, 강유전체 PZT, 상부 Pt 전극의 순으로 적층된 강유전체 캐패시터에 있어서, 상기 타이타늄 접착층의 두께를 50Å 이하로 형성하여 상기 하부 Pt 전극의 두께를 700Å 이하로 형성한 것을 특징으로 한다.In order to achieve the above object, the ferroelectric capacitor according to the present invention is a ferroelectric capacitor laminated in the order of the lower Pt electrode, the ferroelectric PZT, the upper Pt electrode on the Si / SiO 2 substrate, the thickness of the titanium adhesive layer 50 Å The thickness of the lower Pt electrode is formed to be 700 Å or less.

또한, 상기와 같은 목적을 달성하기 위하여 본 발명에 따른 강유전체 캐패시터의 제조 방법은, Si/SiO2기판 상에 접착층으로 Ti를 50Å 이하의 두께로 증착하는 단계; 상기 접착층 상에 하부 전극으로 Pt를 700Å 이하의 두께로 증착하는 단계; 상기 하부 전극 상에 강유전체로 PZT를 증착하는 단계; 상기 강유전체층 상에 상부 전극으로 Pt를 적층하는 단계;를 포함하는 것을 특징으로 한다.In addition, in order to achieve the above object, a method of manufacturing a ferroelectric capacitor according to the present invention, the step of depositing a thickness of 50 Å or less Ti as an adhesive layer on a Si / SiO 2 substrate; Depositing Pt on the adhesive layer to a lower electrode at a thickness of 700 kPa or less; Depositing PZT as a ferroelectric on the lower electrode; And stacking Pt on the ferroelectric layer as an upper electrode.

본 발명에 있어서, 상기 Ti 접착층 및 Pt 하부 전극은 200℃에서 스퍼터링법으로 증착하고, 상기 PZT는 600℃에서 유기 금속 화학 기상 증착법으로 증착하며, 상기 유기 금속 화학 기상 증착법에 의한 PZT 증착시 Pb 증기 공급량은 50~52 sccm으로 유지하는 것이 바람직하다.In the present invention, the Ti adhesive layer and the Pt lower electrode are deposited by sputtering at 200 ℃, the PZT is deposited by organic metal chemical vapor deposition at 600 ℃, Pb vapor during PZT deposition by the organic metal chemical vapor deposition method It is preferable to maintain the supply amount at 50-52 sccm.

이하 도면을 참조하면서 본 발명에 따른 강유전체 캐패시터 및 그 제조 방법을 설명한다.Hereinafter, a ferroelectric capacitor and a manufacturing method thereof according to the present invention will be described with reference to the drawings.

본 발명은 기본적으로 스퍼터링법으로 하부 전극인 백금층의 두께를 얇게 형성하여 백금 전극 표면의 거칠기를 개선함으로써, 그 상부에 유기 금속 화학 기상 증착법으로 증착되는 PZT 박막의 grain size가 작고 표면 형상(surface morphology)이 좋은 강유전체 캐패시터를 얻는데 특징이 있다.According to the present invention, the thickness of the platinum layer, which is a lower electrode, is thinly formed by sputtering to improve the roughness of the surface of the platinum electrode. Good morphology is characteristic of obtaining good ferroelectric capacitors.

먼저, 본 발명에 따른 강유전체 캐패시터는, 도 1의 종래의 강유전체 캐패시터와 같이, Si/SiO2기판(1) 상에 Ti 접착층(2), 하부 Pt 전극(3), 강유전체 PZT(4), 상부 Pt 전극(5)의 순으로 적층되는데, 상기 Ti 접착층(2)의 두께는 50Å 이하로 형성되게 하고, 상기 하부 Pt 전극(3)의 두께는 700Å 이하로 되도록 한다. 이상과 같은 강유전체 캐패시터의 제조 방법을 설명하면 다음과 같다.First, the ferroelectric capacitor according to the present invention, like the conventional ferroelectric capacitor of FIG. 1, has a Ti adhesive layer 2, a lower Pt electrode 3, a ferroelectric PZT 4, and an upper portion on a Si / SiO 2 substrate 1. The Pt electrodes 5 are stacked in this order, and the thickness of the Ti adhesive layer 2 is 50 Å or less, and the thickness of the lower Pt electrode 3 is 700 Å or less. The manufacturing method of the ferroelectric capacitor as described above is as follows.

먼저, SiO2/Si 기판(1) 상에 스퍼터링법으로 Ti를 50Å 이하의 두께로 증착하여 접착층(2)를 형성한다. 이 때, 스퍼터링은 200℃정도에서 행한다.First, Ti is deposited on the SiO 2 / Si substrate 1 by a thickness of 50 GPa or less by sputtering to form an adhesive layer 2. At this time, sputtering is performed at about 200 degreeC.

다음에, 상기 Ti 접착층(2) 상에 역시 스퍼트링법으로 Pt를 700Å 이하의 두께로 증착하여 하부 전극(3)을 형성한다. 이 때, 역시 스퍼터링 온도는 200℃ 정도로 한다. 따라서 전극의 총 두께는 750Å 이하가 된다.Next, Pt is deposited on the Ti adhesive layer 2 by a sputtering method to a thickness of 700 GPa or less to form the lower electrode 3. At this time, the sputtering temperature is also about 200 ° C. Therefore, the total thickness of the electrode is 750 kPa or less.

다음에, 상기 Pt 하부 전극(3) 상에 유기 금속 화학 기상 증착법으로 PZT를 증착하여 강유전체층(4)을 형성한다. 이 때, 유기 금속 화학 기상 증착 공정은 600℃ 정도의 온도에서 수행하며, PZT 증착을 위해 공급되는 Pb 증기 공급량은 50~52 sccm으로 유지하여 과잉의 Pb 함유로 인한 PZT 박막의 표면 거칠기의 증가 및 누설 전류의 증가를 방지한다.Next, PZT is deposited on the Pt lower electrode 3 by an organometallic chemical vapor deposition method to form a ferroelectric layer 4. At this time, the organic metal chemical vapor deposition process is carried out at a temperature of about 600 ℃, Pb vapor supply for PZT deposition is maintained at 50 ~ 52 sccm to increase the surface roughness of the PZT thin film due to excess Pb content and Prevents an increase in leakage current.

다음에, 상기 PZT 강유전체층(4) 상에 상부 전극으로 Pt를 적층하여 상부 전극(5)를 형성하여 캐패시터를 완성한다.Next, Pt is laminated on the PZT ferroelectric layer 4 by the upper electrode to form the upper electrode 5 to complete the capacitor.

이와 같이 제조된 강유전체 캐패시터에서 PZT박막의 특성을 도 5 내지 도 7을 참조하여 살펴보면 다음과 같다.The characteristics of the PZT thin film in the ferroelectric capacitor manufactured as described above will be described with reference to FIGS. 5 to 7.

도 5는 두께를 얇게함으로써 막질이 개선된 하부 전극 상에 MOCVD법으로 증착된 PZT 박막의 X-ray회절 패턴을 나타낸다. 여기서, (111) 방향의 perovskite phase의 PZT가 우선적으로 성장했음을 알 수 있으며, (111) 방향의 perovskite phase으로성장된 PZT를 나타내는 X-ray의 세기가 매우 크다. X-ray에 의해 측정된 모든 시편들은 동일한 측정 조건에서 분석된 것으로 비교가 가능하다.FIG. 5 shows an X-ray diffraction pattern of a PZT thin film deposited by MOCVD on the lower electrode whose film quality is improved by thinning the thickness. Here, it can be seen that the PZT of the perovskite phase in the (111) direction preferentially grows, and the intensity of the X-ray representing the PZT grown in the perovskite phase of the (111) direction is very large. All specimens measured by X-ray can be compared under the same measurement conditions.

도 6은 두께를 얇게함으로써 막질이 개선된 하부 전극 상에 MOCVD법으로 증착된 PZT 박막의 히스테리시스 특성 곡선이다. remanant polarization이 48μC/cm2로 비교적 높은 수치를 나타내고 있으며 누설 전류 특성도 양호함을 나타낸다.6 is a hysteresis characteristic curve of a PZT thin film deposited by MOCVD on a lower electrode whose film quality is improved by thinning the thickness. Remanant polarization shows 48μC / cm 2, which is relatively high and shows good leakage current characteristics.

이상 설명한 바와 같은 강유전체 캐패시터에서 하부 전극의 두께를 3000Å에서 750Å으로 줄이는 것은 단차를 1/4 이상 줄임으로써 더욱 미세한 구조를 갖는 소자를 만들 수 있으며, 오히려 특성의 개선을 나타내어 집적화를 추구할 때 결정적으로 기여할 수 있다. 또한, 이는 후속 공정 중에 열처리로 인해 발생할 수 있는 힐록(hillock) 현상에 견딜 수 있는 최소의 두께가 된다. 그러나 본 발명이 갖는 가장 큰 특징은 두께를 줄일 때 나타나는 효과인 거시(macro)적으로는 부드러우면서 미시적(micro)으로는 거칠은 백금 하부 전극을 얻을 수 있다는 것이다. 이와 같이 막질이 개선된 백금 전극 상에 MOCVD법에 의한 PZT를 증착함으로써, 초기 핵 생성 위치를 더욱 많이 제공하는 결과를 가져와 증착된 PZT 박막 내의 그레인 사이즈가 작아지는 동시에 이로 인해 PZT 박막의 표면 형상(surface morphology)가 좋아지는 효과를 나타낸다. 이와 같이 강유전체의 그레인 사이즈가 작아짐으로써 고온에서 PZT 박막을 MOCVD법에 의해 형성하는 경우 강한 결정성을 보이며 박막 전체 표면이 거칠어지는 현상이 방지되며 비교적 좋은 표면 형상을 보인다. 따라서MOCVD법에 의한 강유전체 캐패시터 제조가 훨씬 더 용이해진다. 더욱이 금속 전극의 두께를 감소시켜 PZT 박막의 특성을 개선하는 방법은 박막의 평탄화를 위해 별도의 화학적 혹은 물리적 폴리싱 공정(polishing process)를 도입할 필요가 없으며, 증착 시간을 감소시키는 효과가 있다. 또한, 도 5의 X-ray 회절 패턴에서 나타난 바와 같이, 본 발명의 방법에서는 PZT의 그레인 사이즈가 작아지면서 perovskite peak intensity가 매우 커지는 동시에 (111) 방향의 성장이 압도적인 지향성 성장이 일어나는 효과도 있다.In the above-described ferroelectric capacitors, reducing the thickness of the lower electrode from 3000 mW to 750 mW can reduce the level difference by more than 1/4 to create a device having a finer structure. Can contribute. In addition, this is the minimum thickness that can withstand the hillock phenomenon that may occur due to heat treatment during subsequent processing. However, the greatest feature of the present invention is that it is possible to obtain a platinum lower electrode that is macroscopically soft and microscopically rough, which is an effect of reducing the thickness. The deposition of PZT by MOCVD on the platinum electrode with improved film quality results in providing more initial nucleation sites, resulting in a smaller grain size in the deposited PZT thin film and thus the surface shape of the PZT thin film. surface morphology). As such, the grain size of the ferroelectric is reduced, so that when the PZT thin film is formed by MOCVD at a high temperature, it exhibits strong crystallinity, prevents roughening of the entire surface of the thin film, and exhibits a relatively good surface shape. Therefore, the production of ferroelectric capacitors by MOCVD is much easier. In addition, the method of reducing the thickness of the metal electrode to improve the properties of the PZT thin film does not require a separate chemical or physical polishing process to planarize the thin film, and has an effect of reducing the deposition time. In addition, as shown in the X-ray diffraction pattern of FIG. 5, in the method of the present invention, the grain size of the PZT decreases, the perovskite peak intensity becomes very large, and the growth in the (111) direction has an effect of directional growth. .

Claims (5)

Si/SiO2기판 상에 Ti 접착층, 하부 Pt 전극, 강유전체 PZT, 상부 Pt 전극의 순으로 적층된 강유전체 캐패시터에 있어서,In a ferroelectric capacitor stacked on a Si / SiO 2 substrate in order of a Ti adhesive layer, a lower Pt electrode, a ferroelectric PZT, and an upper Pt electrode, 상기 Ti 접착층의 두께는 50Å 이하로 형성되며,The thickness of the Ti adhesive layer is formed to 50 Å or less, 상기 하부 Pt 전극의 두께는 700Å 이하로 형성된 것을 특징으로 하는 강유전체 캐패시터.The lower Pt electrode has a thickness of less than 700 캐 ferroelectric capacitor, characterized in that formed. Si/SiO2기판 상에 접착층으로 Ti를 50Å 이하의 두께로 증착하는 단계;Depositing Ti to a thickness of 50 GPa or less with an adhesive layer on a Si / SiO 2 substrate; 상기 접착층 상에 하부 전극으로 Pt를 700Å 이하의 두께로 증착하는 단계;Depositing Pt on the adhesive layer to a lower electrode at a thickness of 700 kPa or less; 상기 하부 전극 상에 강유전체로 PZT를 유기 금속 화학 기상 증착법으로 증착하는 단계;Depositing PZT on the lower electrode by ferroelectric by organometallic chemical vapor deposition; 상기 강유전체층 상에 상부 전극으로 Pt를 적층하는 단계;를Stacking Pt as an upper electrode on the ferroelectric layer; 포함하는 것을 특징으로 하는 강유전체 캐패시터의 제조 방법.Method for producing a ferroelectric capacitor, characterized in that it comprises a. 제2항에 있어서,The method of claim 2, 상기 Ti 접착층 및 Pt 하부 전극은 200℃에서 스퍼터링법으로 증착하는 것을 특징으로 하는 강유전체 캐패시터의 제조 방법.The Ti adhesive layer and the Pt lower electrode are manufactured by sputtering at 200 ° C. A method of manufacturing a ferroelectric capacitor. 제2항에 있어서,The method of claim 2, 상기 PZT를 600℃에서 증착하는 것을 특징으로 하는 강유전체 캐패시터의 제조 방법.And depositing the PZT at 600 ° C. 제2항에 있어서,The method of claim 2, 상기 PZT 증착시 Pb 증기 공급량은 50~52 sccm으로 유지하는 것을 특징으로 하는 강유전체 캐패시터의 제조 방법.Method for producing a ferroelectric capacitor, characterized in that the Pb vapor supply amount is maintained at 50 ~ 52 sccm during the deposition of the PZT.
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JPH04125958A (en) * 1990-09-17 1992-04-27 Nec Corp Thin film capacitor
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JPH06120072A (en) * 1992-10-02 1994-04-28 Matsushita Electron Corp Capacitive element
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JPH04125958A (en) * 1990-09-17 1992-04-27 Nec Corp Thin film capacitor
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JPH06120072A (en) * 1992-10-02 1994-04-28 Matsushita Electron Corp Capacitive element
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8729614B2 (en) 2010-06-29 2014-05-20 Sungkyunkwan University Foundation For Corporate Collaboration Flexible ferroelectric memory device and manufacturing method for the same

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