JPH09129827A - Ferroelectric capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain alloy reaction between a forming surface and a metal electrode layer which is caused by diffusion of components, and improve adhesion, by interposing a ZrO2 layer between the forming surface of a capacitor and the metal electrode layer containing platinum. SOLUTION: A ZrO2 layer is formed on a silicon substrate of high resistance which is sufficiently cleaned, by a solgel method using a solgel solution of zirconia alcoxide. Thermal treatment is performed to the ZrO2 layer at 800 deg.C for 30 minutes. Platinum is evaporated to be 200nm thick as a lower part electrode on the ZrO2 layer, maintaining the substrate at 400 deg.C, by using an electron beam vacuum evaporation method. After evaporation, thermal treatment is performed in an oxygen atmosphere at 800 deg.C for 30 minutes. Bismuth layer ferroelectric compound of SrBi2 Ta2 O9 is formed on the platinum lower part electrode, and platinum is evaporated as an upper part electrode 10 on the ferroelectrics compound, by using an electron beam vacuum evaporation method. After that, a substratum electrode 8 is led out, and a ferroelectrics capacitor 22 is formed. Thereby, adhesion of a metal electrode layer and the forming surface of a ferroelectrics capacitor 22 is increased.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, a DRAM.
(Dynamic Random Access Memory), FR
The present invention relates to a ferroelectric capacitor suitable for application to a semiconductor memory such as AM (ferroelectric random access memory), particularly a ferroelectric memory.

[0002]

The semiconductor memory using a Conventional ferroelectric capacitor, forming surface of the ferroelectric capacitor, for example, polycrystalline silicon layer, or an interlayer insulating layer made of SiO _2, on the A lower electrode is formed, and an upper electrode is formed on the lower electrode via a ferroelectric layer,
A ferroelectric capacitor having a large capacitance is formed between the lower and upper electrodes.

At this time, as the ferroelectric material used for the ferroelectric capacitor, SrTiO ₃ , Ba _x Sr _1-x T are used.
iO ₃ , PbZr _x Ti _1-x O ₃ , SrBi ₂ Ta ₂ O
Oxides such as ₉ are considered.

By the way, in forming these oxide materials,
Although a heat treatment step in an oxidizing atmosphere is required, when a normal metal is used as an electrode material, the surface of the electrode metal is oxidized during the heat treatment of this oxide. As a result, a low dielectric layer or a paraelectric layer is formed between the dielectric film and the electrode material, which deteriorates the device characteristics of the DRAM or FRAM.

Therefore, chemically stable platinum is generally used as the electrode material of the ferroelectric capacitor of this type of device.

[0006]

However, for example, when the lower electrode made of platinum Pt is formed on the silicon Si on the surface where the ferroelectric capacitor is formed, the temperature is 400 ° C. or higher in the above-mentioned oxide heat treatment step. Β- of zonal tissue
An alloy layer of platinum-silicon in which Pt ₂ Si, α-Pt ₃ Si having a network structure, PtSi having an island structure and the like are mixed is formed, and the silicon surface is roughened. At this time, the resistance value also increases, causing a problem in the function as an electrode.

Therefore, in general, SiO ₂ is interposed as a buffer layer between the silicon surface and the platinum electrode.
By doing so, the alloying reaction between silicon and platinum is prevented even by the heat treatment at a relatively high temperature of 700 ° C. to 800 ° C., the surface is kept smooth, and there is no problem such as deterioration of electrical characteristics.

However, after the lower electrode is formed and heat-treated, the ferroelectric oxide is formed by a film forming method such as a CVD (Chemical Vapor Deposition) method in which a stress is applied to the film during film formation. In this case, since the adhesion between platinum and SiO ₂ is poor, the film peels off at this portion.

At this time, in order to improve the adhesion, Si
When titanium is used instead of O ₂ , the adhesion is improved, but the surface of the platinum electrode is roughened due to the diffusion of platinum and titanium and the strain due to the oxidation of titanium diffused to the columnar crystal interface of platinum. In addition to titanium, tantalum and IrO ₂
It is said that the same phenomenon will occur when the above method is used.

Furthermore, Ti / TiN / Si and Ir / Ir
It has been reported that the above-mentioned problems also occur in the electrode having good electrical characteristics such as O ₂ / Si when the temperature exceeds 650 ° C.

The present invention aims to solve the above-mentioned problems by improving the adhesion between the metal electrode containing platinum and the surface on which the electrode is formed.

[0012]

A ferroelectric capacitor according to the present invention.
The capacitor is made of ZrO on the surface where the ferroelectric capacitor is formed. _Two
Contains platinum as an electrode of a ferroelectric capacitor through a layer
The metal electrode layer is formed.

According to the above-described structure of the present invention, by interposing the ZrO ₂ layer between the formation surface of the ferroelectric capacitor and the platinum-containing metal electrode layer, the formation surface and the metal electrode layer are separated from each other. It is possible to suppress the alloying reaction due to the diffusion of the components in between.

[0014]

DETAILED DESCRIPTION OF THE INVENTION The ferroelectric capacitor of the present invention is
A ZrO ₂ layer is formed between the electrode layer made of the metal containing platinum and the surface on which the ferroelectric capacitor is formed, that is, the electrode formation surface.

The outline of the ferroelectric capacitor according to the present invention will be described.

In the ferroelectric capacitor of the present invention, a lower electrode made of a metal containing platinum is formed on the surface where the ferroelectric capacitor is formed via a ZrO ₂ layer, and a ferroelectric layer is formed on the lower electrode. An upper electrode made of a metal containing platinum is formed thereon. At this time ZrO ₂
The layer serves as a buffer layer between the lower electrode and the surface where the capacitor is formed.

As a surface on which the ferroelectric capacitor is formed, a silicon substrate, a polycrystalline silicon layer, an insulating layer such as SiO ₂ or the like can be used.

The ZrO ₂ (zirconia) layer can be formed into a thin film by a sol-gel method, a sputtering method, a MOCVD method, an RF (radio frequency) sputtering method or the like. As the source material in the case of the sol-gel method, for example, tetramethoxyzirconium, tetra-i-propoxyzirconium, tetra-n-propoxyzirconium, tetra-
A zirconia alkoxide such as t-butoxyzirconium, that is, an organometallic compound material of zirconia is used. Then, for example, a film can be formed using 2-methoxyethanol as a solvent and acetylacetone as a catalyst.

Further, a Zr metal layer is formed by vapor deposition,
ZrO can also be obtained by thermally oxidizing it. _TwoForming layers
Can be.

ZrO ₂ has a crystal structure of a tetragonal crystal or a monoclinic crystal, and is formed as the single crystal or a mixed crystal having these as a main phase.

In order to partially stabilize ZrO ₂ ,
Y ₂ O ₃ , CaO, MgO, Al ₂ O _{3 in} ZrO ₂
X mol% (0 <x ≦ 10) can also be added. At this time, the crystal structure of partially stabilized ZrO ₂ is tetragonal, or a mixed crystal of tetragonal and monoclinic, and tetragonal and cubic. By forming a mixed crystal having different crystal structures, it is possible to densely fill the mixed crystal, which results in ZrO ₂
The strength of is improved.

The particle size of the particles forming this ZrO ₂ layer is
In order to make the electrode formation surface flat, it is preferable that it is finer.

The platinum-containing metal electrode layer forming the lower electrode and the upper electrode is made of platinum or a platinum alloy of platinum and a metal of the platinum group. Then, it can be formed by vapor deposition such as electron beam vacuum vapor deposition, DC sputtering, and RF sputtering. In the case of a platinum alloy, a step of sequentially laminating layers of each alloy component and then alloying may be performed. After forming the metal electrode layer, heat treatment is performed in an oxygen atmosphere to stabilize the electrode layer.

The material of the ferroelectric layer is, for example, Pb.
(Zr, Ti) O ₃ (PZT), bismuth layered compound S
Ferroelectric materials that are commonly used for ferroelectric capacitors, such as rBi ₂ (Ta, Nb) ₂ O ₉ , can be used.

Pb (Zr, Ti) O ₃ is formed by a sol-gel method or the like using lead acetate trihydrate, tetrapropoxyzirconium, tetraisopropoxytitanium or the like as a source material and 2-methoxyethanol as a solvent. can do.

Bismuth layered compound SrBi ₂ (Ta, N
b) ₂ O ₉ is, for example, dipivaloyl strontium, triphenylbismuth, Ta (OCH ₃ ) ₅ , Nb (OC
A film can be formed by a CVD (chemical vapor deposition) method, a MOD (organic metal growth) method or the like using H ₃ ) ₅ or the like as a source material.

The temperature of the heat treatment of the ferroelectric material is selected according to the dielectric material used. For example, PZT has 650
700 ° C, 650 to 800 ° C for SrBi ₂ Ta ₂ O ₉
It is preferable that the heat treatment is performed at.

Next, a concrete example of the ferroelectric capacitor of the present invention will be shown together with its manufacturing method.

(Embodiment 1) In this embodiment, a buffer layer Z is formed on a silicon substrate on which a ferroelectric capacitor is formed.
The rO ₂ layer is formed by the sol-gel method, and Sr is used as a ferroelectric.
This is the case when Bi ₂ Ta ₂ O ₉ is used.

First, a ZrO ₂ layer was formed by a sol-gel method using a sol-gel solution composed of zirconia alkoxide on a sufficiently washed high-resistance silicon substrate. This was heat-treated at 800 ° C. for 30 minutes.

When this film was analyzed by X-ray diffraction,
The tetragonal ZrO ₂ phase was the main peak. AF
From the surface observation by M (Atomic Force Microscope), the particle size of ZrO ₂ at this time is about 30.
nm. The thickness of the ZrO ₂ layer was about 50 nm.

On this, by electron beam vacuum evaporation method,
While keeping the substrate at 400 ° C., platinum was vapor-deposited as a lower electrode to a thickness of about 200 nm. After vapor deposition, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

On the platinum lower electrode, S is formed by the MOD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm.

Further, platinum was vapor-deposited thereon as an upper electrode by the electron beam vacuum vapor deposition method while keeping the substrate at 400 ° C. After vapor deposition, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Embodiment 2) In this embodiment, a buffer layer Z is formed on a silicon substrate on which a ferroelectric capacitor is formed.
The rO ₂ layer is formed by the sol-gel method, and PZ is used as a ferroelectric.
This is the case when T is used.

First, a ZrO ₂ layer was formed by a sol-gel method using a sol-gel solution containing zirconia alkoxide on a sufficiently washed high-resistance silicon substrate. This was heat-treated at 800 ° C. for 30 minutes.

When this film was analyzed by X-ray diffraction,
The tetragonal ZrO ₂ phase was the main peak. AF
From observation of the surface by M, the grain size of the ZrO ₂ film at this time was about 50 nm. The thickness of the ZrO ₂ layer is about 9
It was set to 0 nm.

On this, by electron beam vacuum evaporation method,
While keeping the substrate at 400 ° C., platinum was vapor-deposited as a lower electrode to a thickness of about 200 nm. After vapor deposition, heat treatment was performed at 700 ° C. for 30 minutes in an oxygen atmosphere.

By the sol-gel method on the platinum lower electrode,
Pb (Zr _0.53 Ti _0.47 ) O ₃ was deposited to a thickness of about 300 nm.

Further, platinum was sputtered thereon as an upper electrode by an RF sputtering method at room temperature.
After sputtering, heat treatment was performed at 700 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Embodiment 3) This embodiment is a ferroelectric capacitor.
As a surface for forming the passivator, SiO is formed on the silicon substrate. _TwoMembrane
Formed and buffer layer of ZrO on it_TwoLayers sol-gel
Formed by the method of forming SrBi as a ferroelectric_TwoTa_TwoO₉To
This is the case when used.

First, a SiO ₂ film of a thermal oxide film was formed to a thickness of about 90 nm on the surface of a substrate, and a ZrO ₂ layer was formed by a sol-gel method using a sol-gel solution containing zirconia alkoxide on a sufficiently washed high-resistance silicon substrate. A film was formed. This was heat-treated at 800 ° C. for 30 minutes.

When this film was analyzed by X-ray diffraction,
The tetragonal ZrO ₂ phase was the main peak. AF
From observation of the surface by M, the particle size of the ZrO ₂ film at this time was about 30 nm. The thickness of the ZrO ₂ layer is about 7
It was set to 0 nm.

On this, by electron beam vacuum evaporation method,
While keeping the substrate at 400 ° C., platinum was vapor-deposited as a lower electrode to a thickness of about 200 nm. After vapor deposition, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

On the platinum lower electrode, S was formed by the MOD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm.

Further, platinum was vapor-deposited thereon as an upper electrode by electron beam vacuum vapor deposition while keeping the substrate at 400 ° C. After vapor deposition, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Embodiment 4) This embodiment is a ferroelectric capacitor.
As a surface for forming the passivator, SiO is formed on the silicon substrate. _TwoMembrane
Formed and buffer layer of ZrO on it_TwoLayers sol-gel
Formed by the method of forming SrBi as a ferroelectric_TwoTa_TwoO₉To
This is the case when used.

First, a SiO ₂ film of a thermal oxide film was formed to a thickness of about 300 nm on the surface of a substrate, and a ZrO ₂ layer was formed by a sol-gel method using a sol-gel solution composed of zirconia alkoxide on a sufficiently washed high-resistance silicon substrate. A film was formed. This was heat-treated at 800 ° C. for 30 minutes.

When this film was analyzed by X-ray diffraction,
The tetragonal ZrO ₂ phase was the main peak. AF
From observation of the surface by M, the particle size of the ZrO ₂ film at this time was about 30 nm. The thickness of the ZrO ₂ layer is about 7
It was set to 0 nm.

On this, by the RF sputtering method,
While keeping the substrate at 300 ° C., platinum was sputtered to a thickness of about 200 nm as a lower electrode. After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

On the platinum lower electrode, S was formed by the MOD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm.

Further, platinum was sputtered thereon as an upper electrode by an RF sputtering method at room temperature.
After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Embodiment 5) This embodiment is a ferroelectric capacitor.
As a surface for forming the passivator, SiO is formed on the silicon substrate. _TwoMembrane
Formed and buffer layer of ZrO on it_TwoLayers sol-gel
Formed by the method of forming SrBi as a ferroelectric_TwoNb_TwoO₉To
This is the case when used.

The bismuth layer compound was added to SrBi ₂ Nb ₂ O.
_A ferroelectric capacitor was formed in the same manner as in Example 4 except that the number was changed to 9.

(Embodiment 6) This embodiment is a ferroelectric capacitor.
As a surface for forming the passivator, SiO is formed on the silicon substrate. _TwoMembrane
Formed and buffer layer of ZrO on it_TwoLayers sol-gel
In the case of using PZT as the ferroelectric substance,
You.

First, a SiO ₂ film of a thermal oxide film was formed to a thickness of about 300 nm on the surface of a substrate, and a ZrO ₂ layer was formed by a sol-gel method on a sufficiently washed high-resistivity silicon substrate using a sol-gel solution composed of zirconia alkoxide. A film was formed. This was heat-treated at 800 ° C. for 30 minutes.

When this film was analyzed by X-ray diffraction,
The tetragonal ZrO ₂ phase was the main peak. AF
From observation of the surface by M, the particle size of the ZrO ₂ film at this time was about 30 nm. The thickness of the ZrO ₂ layer is about 7
It was set to 0 nm.

On this, by the RF sputtering method,
While keeping the substrate at 300 ° C., platinum was sputtered to a thickness of about 200 nm as a lower electrode. After sputtering, heat treatment was performed at 700 ° C. for 30 minutes in an oxygen atmosphere.

By a sol-gel method on the platinum lower electrode,
About 300 Pb (Zr _0.53 Ti _0.47 ) O ₃ dielectric compound
A film having a thickness of nm was formed.

Further, platinum was sputtered thereon as an upper electrode by an RF sputtering method at room temperature.
After sputtering, heat treatment was performed at 700 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Embodiment 7) In this embodiment, the buffer layer Z is formed on the silicon substrate on which the ferroelectric capacitor is formed.
This is a case where the rO ₂ layer is formed by the RF sputtering method, SrBi ₂ Ta ₂ O ₉ is used as a ferroelectric substance, and Y ₂ O ₃ is added for partial stabilization of ZrO ₂ .

First, a ZrO ₂ layer was formed by RF sputtering on a sufficiently washed high resistance silicon substrate. At this time, as the ZrO ₂ substrate used as a target, a partially stabilized ZrO ₂ substrate containing 3 mol% of Y ₂ O ₃ was used. This was heat-treated at 800 ° C. for 30 minutes.

When this film was analyzed by X-ray diffraction,
The tetragonal ZrO ₂ phase was the main peak. AF
From observation of the surface by M, the grain size of the ZrO ₂ film at this time was about 50 nm. The thickness of the ZrO ₂ layer is about 10
It was set to 0 nm.

On this, by electron beam vacuum evaporation method,
While keeping the substrate at 400 ° C., platinum was vapor-deposited as a lower electrode to a thickness of about 200 nm. After vapor deposition, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

On the platinum lower electrode, S was formed by the MOD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm.

Further, platinum was vapor-deposited thereon as an upper electrode by electron beam vacuum vapor deposition while keeping the substrate at 400 ° C. After vapor deposition, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Embodiment 8) This embodiment is a ferroelectric capacitor.
As a surface for forming the passivator, SiO is formed on the silicon substrate. _TwoMembrane
Form and buffer layer ZrO_TwoLayer sputtering method
Formed with SrBi as a ferroelectric_TwoTa_TwoO₉For
And again ZrO_TwoY for partial stabilization of_TwoO_ThreeWith
This is the case when added.

A SiO ₂ film of a thermal oxide film is formed on the surface of the substrate by about 90
nm film formation and on a well-washed high resistance silicon substrate,
A ZrO ₂ layer was formed by the sputtering method. At this time, the ZrO ₂ substrate used as the target, Y ₂ O
₃ was used was a partially stabilized ZrO ₂ substrate added 3 mol%. This was heat-treated at 800 ° C. for 30 minutes.

When this film was analyzed by X-ray diffraction,
The tetragonal ZrO ₂ phase was the main peak. AF
From observation of the surface by M, the grain size of the ZrO ₂ film at this time was about 50 nm. The thickness of the ZrO ₂ layer is about 1
00 nm.

On this, by electron beam vacuum evaporation method,
While keeping the substrate at 400 ° C., platinum was vapor-deposited as a lower electrode to a thickness of about 200 nm. After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

On the platinum lower electrode, S was formed by the MOD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm.

Further, platinum was vapor-deposited thereon as an upper electrode by electron beam vacuum vapor deposition while keeping the substrate at 400 ° C. After vapor deposition, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Embodiment 9) This embodiment is a ferroelectric capacitor.
As a surface for forming the passivator, SiO is formed on the silicon substrate. _TwoMembrane
Form and buffer layer ZrO_TwoLayer sputtering method
Formed with SrBi as a ferroelectric_TwoTa_TwoO₉For
And again ZrO_TwoY for partial stabilization of_TwoO_ThreeWith
This is the case when added.

A bismuth layered ferroelectric compound of SrBi ₂ Ta ₂ O _{9 as} a ferroelectric is formed by CVD (Chemical).
Vapor Deposision (Chemical Vapor Deposition) method was used to form a ferroelectric capacitor in the same manner as in Example 8.

(Embodiment 10) This embodiment is a ferroelectric capacitor.
As a surface for forming the capacitor, SiO is formed on the silicon substrate. _Twofilm
Is formed, Zr is vapor-deposited on it, and then thermal oxidation is used to
ZrO of the stuffer layer _TwoLayer to form Sr as a ferroelectric
Bi_TwoTa_TwoO₉Is the case of using.

SiO of a thermal oxide film is formed on a high resistance silicon substrate.
_Two films of about 300 nm were formed, and on a thoroughly washed substrate,
A film of Zr metal was formed to a thickness of 100 nm by vapor deposition. After the vapor deposition, a heat oxidation treatment was performed at 800 ° C. for 60 minutes in an oxygen atmosphere to oxidize the Zr film.

When this film was analyzed by X-ray diffraction,
The monoclinic ZrO ₂ phase was the main peak.

On this, by the RF sputtering method,
While keeping the substrate at 300 ° C., platinum was sputtered to a thickness of about 200 nm as a lower electrode. After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

S is deposited on the platinum lower electrode by the CVD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm.

Further, platinum was sputtered thereon as an upper electrode by an RF sputtering method at room temperature.
After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

Further, in order to clarify the characteristics of the ferroelectric capacitor according to the present invention, a ferroelectric capacitor which does not have the constitution of the present invention as a base layer will be shown below as a comparative example.

(Comparative Example 1) In this example, a SiO ₂ film was formed on a silicon substrate as a ferroelectric capacitor forming surface, and SrBi ₂ Ta ₂ O ₉ was used as a ferroelectric.
This is a case in which a titanium base film is formed between the O ₂ film and the platinum lower electrode.

A thermal oxide film of SiO is formed on a high resistance silicon substrate.
_Two films of about 300 nm were formed, and on a thoroughly washed substrate,
A Ti metal film having a thickness of 100 nm was sputtered by the RF sputtering method while keeping the substrate at 300 ° C.

While being held in the chamber, platinum was sputtered thereon as a lower electrode to a thickness of about 200 nm by the RF sputtering method while keeping the substrate at 300 ° C. After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

S was deposited on the platinum lower electrode by the MOD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm. On top of this, RF
Platinum was sputtered as an upper electrode at room temperature by the sputtering method. 800 in oxygen atmosphere after sputtering
Heat treatment is performed at 30 ° C. for 30 minutes.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

(Comparative Example 2) In this example, the platinum lower electrode is directly formed on the silicon substrate on which the ferroelectric capacitor is formed.

On a sufficiently washed high resistance silicon substrate,
By the RF sputtering method, platinum was sputtered to a thickness of about 200 nm as a lower electrode while keeping the substrate at 300 ° C. After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

S was deposited on the platinum lower electrode by the MOD method.
A bismuth layered ferroelectric compound of rBi ₂ Ta ₂ O ₉ was deposited to a thickness of about 300 nm. On top of this, RF
Platinum was sputtered as an upper electrode at room temperature by the sputtering method. 800 in oxygen atmosphere after sputtering
Heat treatment was performed at 30 ° C. for 30 minutes.

After that, the base electrode was taken out by the ion milling method to form a ferroelectric capacitor.

Comparative Example 3 This example is a case where a SiO ₂ film is formed on a silicon substrate and a platinum lower electrode is directly formed on the SiO ₂ film as a surface for forming a ferroelectric capacitor.

On the high-resistance silicon substrate, a thermal oxide film of SiO
_Two films were formed to a thickness of about 300 nm. On this, platinum was sputtered to a thickness of about 200 nm as a lower electrode while keeping the substrate at 300 ° C. by the RF sputtering method. After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

Sr was formed on the platinum lower electrode by the MOD method.
Bi ₂ Ta ₂ O _{9 with} a bismuth layered ferroelectric compound of about 3
A film was formed to a thickness of 00 nm.

Further, platinum was sputtered thereon as an upper electrode by an RF sputtering method at room temperature.
After sputtering, heat treatment was performed at 800 ° C. for 30 minutes in an oxygen atmosphere.

After that, the base electrode was taken out by the ion milling method, but the film could be peeled off from the lower electrode at this time, so that the capacitor could not be formed.

The electrical characteristics were evaluated as follows. Device: RT66A manufactured by RADIANT Measurement mode: Virtual Ground Mode With this, the hysteresis loop of the ferroelectric capacitor was measured.

Since the film of Comparative Example 3 had poor adhesion between Pt and SiO ₂ , film peeling occurred and the capacitor could not be formed, so that the measurement could not be performed.

The maximum polarization value of each of the capacitors of the above-mentioned examples (Examples 1 to 12, Comparative Example 1 and Comparative Example 2) +
Ps, spontaneous polarization value + Pr and -Pr, coercive electric field value + Vc
Table 1 shows the measured values of -Vc. In addition, the curves of the hysteresis loops of Example 1 and Comparative Example 1 are shown in FIGS. 1 and 2, respectively.

[0107]

[Table 1]

From Table 1, in Comparative Examples 1 and 2, the value of the spontaneous polarization Pr is smaller than that in each Example. In addition, the asymmetry of the coercive electric field values + Vc and −Vc, and FIG.
It can be seen that there is a phenomenon which is not preferable in electrical characteristics, such as a decrease in the squareness ratio of the hysteresis curve as shown in FIG.

These phenomena are caused by Zr as a buffer layer.
It was not observed in each of the examples in which O ₂ was formed.
_It can be seen that ₂ functions effectively as a buffer layer.

The causes of various phenomena which are problematic in the production of such a capacitor are considered to be deterioration of the morphology of the electrode substrate surface and formation of a low dielectric layer at the interface between the substrate and the ferroelectric substance.

Actually, the surfaces of Examples 1 to 10 have much better smoothness than the surfaces of Comparative Examples 1 and 2 and retain the metallic luster. In Comparative Example 1 and Comparative Example 2, white turbidity or the like was observed on the surface of Pt, and it was observed by an optical microscope that numerous irregularities were generated on this surface.

Furthermore, the capacitors of Example 1, Comparative Example 1 and Comparative Example 2 were analyzed in the depth direction by Auger electron spectroscopy. After removing the ferroelectric substance of each capacitor, each element on the surface was analyzed while shaving the surface from the platinum lower electrode layer toward the capacitor formation surface by sputtering.

The measurement results are shown in FIG. 3 for Example 1, FIG. 4 for Comparative Example 1, and FIG. 5 for Comparative Example 2. In each drawing, the leftmost portion where the sputtering time is 0 is the upper surface of the electrode layer, and the measurement values of the buffer layer or the underlayer and the silicon substrate portion are sequentially measured toward the right. Also,
For ease of comparison within the range of the figure, oxygen O shows an actual value of 1/4 and titanium Ti shows an actual value of 1/2.

From FIG. 4, in the case of Comparative Example 1, Ti and P
It can be seen that t and t diffuse into each other, and Ti deposited on the surface of the underlayer, that is, the interface with the lower electrode, exists as an oxide together with oxygen O. Further, as shown in FIG. 5, in the case of Comparative Example 2, silicon diffuses in Pt and precipitates on the surface.
It can be seen that as in the case of i, it exists as an oxide on the Pt surface.

On the other hand, from FIG. 3, when the ZrO ₂ layer was formed as the buffer layer as in Example 1, Z
It is understood that not only the diffusion of r into Pt does not occur, but also the diffusion of silicon into Pt is suppressed. It can be seen that the properties of the ZrO ₂ layer as such a buffer layer are extremely effective in eliminating external influences on the electrical characteristics.

Therefore, by forming a ZrO ₂ layer as a buffer layer at the interface between the platinum-containing metal electrode layer and the surface of the ferroelectric capacitor formed of silicon or SiO ₂ , the diffusion of silicon ions from the interface is prevented. This can prevent the surface smoothness and improve the adhesion between the metal electrode layer and the surface of the ferroelectric capacitor.

Next, an example in which the ferroelectric capacitor of the present invention is applied to a semiconductor memory such as a non-volatile memory will be shown.

FIG. 6 shows a ferroelectric capacitor according to the present invention.
Of an example of a non-volatile memory with a planar structure applying
FIG. This non-volatile memory is local to the semiconductor substrate 1.
Element isolation formed by partial oxidation so-called LOCOS
The insulating layer 2 is formed, and in the region separated by this,
A source region 5 and a drain region 6 are formed and these
SiO over the source and drain regions 5 and 6_TwoWhat
The gate electrode 4 was formed through which gate insulating film 3
MIS transistor (insulated gate type field effect transistor
Is formed. Furthermore, on this MIS transistor
For example, SiO _TwoAnd BPSG (boron phosphorus series
The interlayer insulating layer 7 made of glass or the like is formed.

The lower electrode 8 made of a metal containing platinum is formed on the interlayer insulating layer 7 on the element isolation insulating layer 2. In the present invention, the lower electrode 8 is formed.
The buffer layer 21 is interposed in the formation part of. The buffer layer 21 is composed of a ZrO ₂ layer. And
A ferroelectric layer 9 is formed on the lower electrode 8, and a similar upper electrode 10 made of, for example, a platinum alloy is formed on the ferroelectric layer 9. As a result, a large-capacity ferroelectric capacitor 22 is constituted by the lower electrode 8, the ferroelectric layer 9 and the upper electrode 10.

Further, an upper insulating layer 11 is formed over the entire surface including the upper electrode 10, and contact holes 12 are formed in the upper insulating layer 11, for example, on the upper electrode 10 and on the source region 5 of the interlayer insulating layer 7. The upper electrode 10 and the source region 5 are bored and contacted by the wiring 13 through the contact holes 12.

Next, an example in which the ferroelectric capacitor of the present invention is applied to another type of semiconductor memory will be described.

FIG. 7 is a sectional view showing an example of a nonvolatile memory having a stack type structure to which the ferroelectric capacitor according to the present invention is applied. In FIG. 7, the same symbols are given to the corresponding portions in FIG. In this nonvolatile memory, a semiconductor substrate 1 is provided with an element isolation insulating layer 2 by local oxidation so-called LOCOS.
Is formed, and a MIS transistor is formed in the region separated by this. That is, also in this case, the source region 5 and the drain region 6 are formed in the same manner as described with reference to FIG. 6, and the gate insulating film 3 such as SiO ₂ is formed between the source and drain regions 5 and 6.
A MIS transistor having a gate electrode 4 formed thereon is formed, and an interlayer insulating layer 7 made of SiO ₂ or the like is further formed thereon.

Then, a plug electrode 20 made of polycrystalline silicon, tungsten, or the like is formed in the contact hole 12 formed on the source region 5 of the interlayer insulating layer 7, and conductive ZrO ₂ is formed on the plug electrode 20. The lower electrode 8 composed of a platinum-containing metal layer is formed with the buffer layer 21 formed therebetween interposed.

Next, the ferroelectric layer 9 is formed on the lower electrode 8.
Is formed, and the upper electrode 10 made of a metal layer containing platinum is formed thereon. As a result, a large-capacity ferroelectric capacitor 22 is constituted by the lower electrode 8, the ferroelectric layer 9 and the upper electrode 10.

Then, the upper insulating layer 11 is formed over the entire surface including the upper electrode 10, and the wiring 13 in contact with the upper electrode 10 is formed through the contact hole formed in the upper insulating layer 11. It has become.

By applying the ferroelectric capacitor of the present invention, the adhesion between the surface on which the ferroelectric capacitor is formed and the metal electrode layer of the capacitor can be improved. Problems such as diffusion of layer materials can be solved, and the characteristics of the ferroelectric substance forming the capacitor can be maximized.

Therefore, a ferroelectric capacitor having good characteristics can be formed, and such a semiconductor memory can be made a semiconductor memory having good electric characteristics.
Further, the manufacturing yield of semiconductor memories is improved, and these semiconductor memories can be manufactured stably and with good productivity.

The ferroelectric capacitor of the present invention is not limited to the above-mentioned embodiments, and various other structures can be adopted without departing from the gist of the present invention.

The ferroelectric capacitor of the present invention can be applied to various elements such as a capacitor alone, a piezoelectric element, and an optical switch, in addition to the above-mentioned ferroelectric memory. As a result, these elements can be formed with good characteristics.

[0130]

Effects of the Invention According to the present invention described above, ZrO ₂ as a buffer layer at the interface between the ferroelectric forming surface of the capacitor by the metal electrode layer and the silicon and SiO ₂ or the like containing platinum
By forming the layer, it is possible to prevent the diffusion of silicon ions from the interface, maintain the surface smoothness, and enhance the adhesion between the metal electrode layer and the surface on which the ferroelectric capacitor is formed.

Since the adhesion between the electrode forming surface and the metal electrode layer can be improved, problems such as film peeling of the electrode layer and diffusion of the material of an adjacent layer to the electrode layer can be solved. As a result, the characteristics of the ferroelectric substance forming the capacitor can be maximized.

By reducing the film peeling, a ferroelectric capacitor having good characteristics can be formed, and the yield of the device using this ferroelectric capacitor is improved, so that these devices can be stably manufactured with good productivity. Can be manufactured.

[Brief description of the drawings]

FIG. 1 is a hysteresis curve of a ferroelectric capacitor of Example 1.

2 is a hysteresis curve of a ferroelectric capacitor of Comparative Example 1. FIG.

FIG. 3 is an analysis result in the depth direction of the ferroelectric capacitor of Example 1.

FIG. 4 is an analysis result in the depth direction of the ferroelectric capacitor of Comparative Example 1.

5 is an analysis result in the depth direction of the ferroelectric capacitor of Comparative Example 2. FIG.

FIG. 6 is a sectional view of an example of a nonvolatile memory having a planar structure to which the ferroelectric capacitor of the present invention is applied.

FIG. 7 is a cross-sectional view of an example of a nonvolatile memory having a stack structure to which the ferroelectric capacitor of the present invention is applied.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Element isolation insulating layer 3 Gate insulating film 4 Gate electrode 5 Source region 6 Drain region 7 Interlayer insulating layer 8 Lower electrode 9 Ferroelectric layer 10 Upper electrode 11 Upper insulating layer 12 Contact hole 13 Wiring 21 Buffer layer 22 Ferroelectric Body capacitor

Claims (8)

[Claims] 1. ZrO is formed on a surface of a ferroelectric capacitor.
_A ferroelectric capacitor, wherein a metal electrode layer containing platinum is formed as an electrode of the ferroelectric capacitor via _two layers. 2. The metal electrode layer is made of platinum, and the metal electrode layer is formed on the surface of the ferroelectric capacitor on which Z is formed.
The ferroelectric capacitor according to claim 1, wherein the ferroelectric capacitor has an rO ₂ layer or a laminated structure in which a SiO ₂ layer is formed under the ZrO ₂ layer. 3. The surface on which the ferroelectric capacitor is formed is a silicon surface, and the metal electrode layer is a ZrO ₂ layer, or a laminated structure of a ZrO ₂ layer and a SiO ₂ layer formed thereunder. The ferroelectric capacitor according to claim 1, wherein the ferroelectric capacitor is formed. 4. The ferroelectric capacitor according to claim 1, wherein the ferroelectric substance forming the ferroelectric capacitor is a bismuth layered compound. 5. The ferroelectric capacitor according to claim 1, wherein the ferroelectric substance forming the ferroelectric capacitor is used for a nonvolatile memory which is a bismuth layered compound. 6. The ferroelectric capacitor according to claim 1, wherein the crystal structure of the ZrO ₂ layer is a tetragonal crystal, a monoclinic single crystal, or a mixed crystal structure mainly containing them. 7. The crystal structure of the ZrO ₂ layer is such that ZrO ₂ contains Y ₂ O ₃ , CaO, MgO, Al ₂ O ₃
2. The strong crystal structure according to claim 1, which is a tetragonal crystal in which x mol% (0 <x ≦ 10) is added, or a mixed crystal structure of a tetragonal crystal and a monoclinic crystal, and a tetragonal crystal and a cubic crystal. Dielectric capacitor. 8. The ferroelectric capacitor according to claim 1, wherein the ZrO ₂ layer is a thermal oxide film of Zr metal.