KR100323242B1 - 높은선택도및높은단차비의산화막식각방법및그공정에의해제조된산물 - Google Patents

높은선택도및높은단차비의산화막식각방법및그공정에의해제조된산물 Download PDF

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Publication number
KR100323242B1
KR100323242B1 KR1019940030287A KR19940030287A KR100323242B1 KR 100323242 B1 KR100323242 B1 KR 100323242B1 KR 1019940030287 A KR1019940030287 A KR 1019940030287A KR 19940030287 A KR19940030287 A KR 19940030287A KR 100323242 B1 KR100323242 B1 KR 100323242B1
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KR
South Korea
Prior art keywords
etch
flow rate
layer
plasma
electrodes
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Expired - Lifetime
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KR1019940030287A
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English (en)
Korean (ko)
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KR950015622A (ko
Inventor
서브하쉬굽타
수잔첸
안젤라후이
Original Assignee
미키오 이시마루
아드밴스트 마이크로 디이바이시스 인코포레이티드
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Publication of KR950015622A publication Critical patent/KR950015622A/ko
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Publication of KR100323242B1 publication Critical patent/KR100323242B1/ko
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Classifications

    • H10P50/00—
    • H10W20/083—
    • H10P50/283—
    • H10W20/089—

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019940030287A 1993-11-30 1994-11-17 높은선택도및높은단차비의산화막식각방법및그공정에의해제조된산물 Expired - Lifetime KR100323242B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/159634 1993-11-30
US08/159,634 US5468340A (en) 1992-10-09 1993-11-30 Highly selective high aspect ratio oxide etch method and products made by the process

Publications (2)

Publication Number Publication Date
KR950015622A KR950015622A (ko) 1995-06-17
KR100323242B1 true KR100323242B1 (ko) 2002-05-13

Family

ID=22573345

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940030287A Expired - Lifetime KR100323242B1 (ko) 1993-11-30 1994-11-17 높은선택도및높은단차비의산화막식각방법및그공정에의해제조된산물

Country Status (5)

Country Link
US (1) US5468340A (enExample)
EP (1) EP0655775A1 (enExample)
JP (1) JP3464061B2 (enExample)
KR (1) KR100323242B1 (enExample)
TW (1) TW249295B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5468339A (en) * 1992-10-09 1995-11-21 Advanced Micro Devices, Inc. Plasma etch process
US5935877A (en) * 1995-09-01 1999-08-10 Applied Materials, Inc. Etch process for forming contacts over titanium silicide
US6001699A (en) * 1996-01-23 1999-12-14 Intel Corporation Highly selective etch process for submicron contacts
DE19707886C2 (de) * 1997-02-27 2003-12-18 Micronas Semiconductor Holding Verfahren zum Erzeugen von Kontaktlöchern in einer Halbleiteranordnung
KR19980084172A (ko) * 1997-05-21 1998-12-05 윤종용 고 식각선택비를 이용한 반도체장치의 건식식각방법
TW430900B (en) * 1997-09-08 2001-04-21 Siemens Ag Method for producing structures having a high aspect ratio
US6066566A (en) * 1998-01-28 2000-05-23 International Business Machines Corporation High selectivity collar oxide etch processes
US6057193A (en) * 1998-04-16 2000-05-02 Advanced Micro Devices, Inc. Elimination of poly cap for easy poly1 contact for NAND product
US6080676A (en) * 1998-09-17 2000-06-27 Advanced Micro Devices, Inc. Device and method for etching spacers formed upon an integrated circuit gate conductor
US6281132B1 (en) 1998-10-06 2001-08-28 Advanced Micro Devices, Inc. Device and method for etching nitride spacers formed upon an integrated circuit gate conductor
US6221745B1 (en) * 1998-11-27 2001-04-24 Taiwan Semiconductor Manufacturing Company High selectivity mask oxide etching to suppress silicon pits
US6214742B1 (en) * 1998-12-07 2001-04-10 Advanced Micro Devices, Inc. Post-via tin removal for via resistance improvement
EP1132959A1 (en) 2000-03-03 2001-09-12 STMicroelectronics S.r.l. A method of forming low-resistivity connections in non-volatile memories
JP3539946B2 (ja) * 2002-03-28 2004-07-07 沖電気工業株式会社 Ｓｏｉ構造を有する半導体装置の製造方法
US8246786B2 (en) * 2009-09-03 2012-08-21 Pratt & Whitney Rocketdyne, Inc. Solar desalinization plant
US8246787B2 (en) * 2009-09-03 2012-08-21 Pratt & Whitney Rockedyne, Inc. Solar desalinization plant

Family Cites Families (14)

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Publication number Priority date Publication date Assignee Title
US4795722A (en) * 1987-02-05 1989-01-03 Texas Instruments Incorporated Method for planarization of a semiconductor device prior to metallization
GB2214709A (en) * 1988-01-20 1989-09-06 Philips Nv A method of enabling connection to a substructure forming part of an electronic device
US4871421A (en) 1988-09-15 1989-10-03 Lam Research Corporation Split-phase driver for plasma etch system
US5254213A (en) * 1989-10-25 1993-10-19 Matsushita Electric Industrial Co., Ltd. Method of forming contact windows
US5026666A (en) * 1989-12-28 1991-06-25 At&T Bell Laboratories Method of making integrated circuits having a planarized dielectric
US4978420A (en) * 1990-01-03 1990-12-18 Hewlett-Packard Company Single chamber via etch through a dual-layer dielectric
US5021121A (en) * 1990-02-16 1991-06-04 Applied Materials, Inc. Process for RIE etching silicon dioxide
US5213659A (en) * 1990-06-20 1993-05-25 Micron Technology, Inc. Combination usage of noble gases for dry etching semiconductor wafers
US5022958A (en) * 1990-06-27 1991-06-11 At&T Bell Laboratories Method of etching for integrated circuits with planarized dielectric
JP2697952B2 (ja) * 1990-11-15 1998-01-19 シャープ株式会社 半導体装置の製造方法
US5176790A (en) * 1991-09-25 1993-01-05 Applied Materials, Inc. Process for forming a via in an integrated circuit structure by etching through an insulation layer while inhibiting sputtering of underlying metal
US5269879A (en) * 1991-10-16 1993-12-14 Lam Research Corporation Method of etching vias without sputtering of underlying electrically conductive layer
US5284549A (en) * 1992-01-02 1994-02-08 International Business Machines Corporation Selective fluorocarbon-based RIE process utilizing a nitrogen additive
US5468339A (en) * 1992-10-09 1995-11-21 Advanced Micro Devices, Inc. Plasma etch process

Also Published As

Publication number Publication date
JPH07193057A (ja) 1995-07-28
JP3464061B2 (ja) 2003-11-05
TW249295B (enExample) 1995-06-11
EP0655775A1 (en) 1995-05-31
US5468340A (en) 1995-11-21
KR950015622A (ko) 1995-06-17

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