KR100300396B1 - Method for delay compensation driving of liquid crystal display - Google Patents

Abstract

PURPOSE: A delay compensation driving method of a liquid crystal display is provided to completely remove the data interference between lines due to the line delay and resolve the cross talk of RMS(root-mean-square) values between lines due to the on/off conversion for pixels, thereby improving the uniformity of luminance of a screen. CONSTITUTION: In a delay compensation driving method of a liquid crystal display, a common electrode driving buffer of a common electrode driving IC is inserted with n-1 delay resistance for delaying an enabling timing for the common electrode driving buffer, and a segment driving buffer of a segment electrode driving IC is inserted with m-1 delay resistance for delaying an enabling timing for the segment driving buffer.

Description

Delay Compensation Driving Method of LCD

1 is a cross-sectional view showing the structure of a general LCD,

FIG. 2 is an equivalent circuit diagram showing an electrical equivalent circuit of the LCD cell as shown in FIG.

3 is a block diagram showing a conventional LCD driving apparatus,

4A and 4B are waveform diagrams showing output signals of a common common electrode driver.

5a and 5b are waveform diagrams showing output signals of the common electrode which are delayed in the conventional common electrode,

6 is a waveform diagram showing a driving voltage of a common electrode and a data voltage of a segment electrode in the related art.

7 is a waveform diagram showing a delayed driving voltage and a data voltage in a conventional delayed signal region,

8 is a schematic diagram showing a delay between signal electrodes on a general liquid crystal panel,

9A to 9C are waveform diagrams showing blanks inserted into signal voltages of a common electrode and a segment electrode according to the present invention;

10 is a circuit diagram showing an embodiment of compensating for time delay according to the present invention;

11 is a block diagram showing another embodiment of compensating for time delay according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a simple matrix driving method of a liquid crystal display device, and more particularly, to a method for effectively optimizing a delay caused by a driving electrode.

In general, APT (Alto-pleshko Tech) method, which is a simple matrix driving method, is a line-at-a-time method, when one common electrode is selected, data signals are simultaneously applied to all segment electrodes. And the common electrodes are sequentially scanned to display an image.

1 is a cross-sectional view showing the structure of a general liquid crystal display device, in which '1' represents a top plate Glan, '2' represents a segment electrode, '3' and '5' represent an alignment layer, and '4' represents a liquid crystal. '6' represents a common electrode, and '7' represents a lower plate glan.

FIG. 2 is an equivalent circuit diagram showing the electrical equivalent circuit of the LCD as shown in FIG. 1, wherein 'Re' represents resistance of the ITO electrode, 'Ca' represents capacitance of the alignment layer, and 'R _L ' represents the resistance of the liquid crystal. , 'C _L ' represents the capacitance of the liquid crystal.

3 is a block diagram showing a driving device of a conventional LCD, where 9 and 9 'are driving integrated circuit devices (IC) of segment electrodes, and 8 and 8' are driving integrated circuit devices (IC) of common electrodes. The liquid crystal cell matrix is driven by the output of the driving devices 8, 8 ', 9, 9' to display an image.

4A and 4B are waveform diagrams showing driving voltages applied to a common electrode in the related art, and 'tp' represents a pulse width of the common electrode. 4A illustrates a driving voltage applied to the i-th common electrode, and FIG. 4B illustrates a driving voltage applied to the i + 1th common electrode. 4A and 4B, driving voltages applied to the common electrode are sequentially scanned without a blank period.

5a and 5b are waveform diagrams showing the output signal of the common electrode driving integrated circuit device and the delayed signal at the end of the common electrode in the conventional LCD, and FIG. 5a shows the driving voltage of the i-th common electrode, and FIG. FIG. 7 shows driving voltages of the i + 1 th common electrode. In FIG. 5A, '10' represents a driving signal that is not delayed at the output terminal of the i-th common electrode driving integrated circuit device, and '11' is a driving signal that appears at the end of the i-th common electrode as shown in FIG. It can be seen that it is distorted. 'A' represents a voltage region lost by delay, and 'b' represents a voltage region added by delay. In FIG. 5B, '12' represents a driving signal that is not delayed at the output terminal of the i + 1th common electrode driving integrated circuit device, and '13' represents a driving signal that appears at the end of the i + 1th common electrode. It can be seen that the delayed and distorted as shown. Also, 'c' represents a voltage region lost by the delay, and 'd' represents a voltage region added by the delay. This delay is due to the lowpass filter characteristics due to the resistance and capacitance of the electrodes. That is, the simple matrix LCD itself uses the signal electrode as a high-resistance ITO electrode with high transmittance in order to increase the transmittance as a light receiving element, and the resistance of the ITO electrode increases by thinning the thickness of the ITO film to improve the transmittance. Therefore, a low pass filter is formed by the resistance of the ITO electrode and the capacitance of the liquid crystal cell constituting each pixel, and thus the signal delay occurs as the output of the driving integrated circuit device (IC) propagates on the panel. This delay causes a delay difference between the common electrode and the segment electrode on the liquid crystal panel to increase the error of the RMS value applied to the liquid crystal cell, thereby causing unbalanced and crosstalk flicker of the screen.

FIG. 6 is a waveform diagram showing a driving voltage of a common electrode and a data voltage of a segment electrode in the related art, where '14' represents a driving voltage of a common electrode, '15' represents an off data voltage of a segment electrode, and 16 'represents the on data voltage of the segment electrode.

7 is a waveform diagram illustrating a delay signal and a data signal in a conventional common electrode, where '17' represents an i-th scan interval, '18' represents an i + l-th scan interval, and '19' represents an interline Represents an area where data overlaps. '20' represents an off data signal of the segment electrode, and '21' represents an on data signal of the segment electrode. In FIG. 7, the rectangular pulse waveform represents the driving voltage of the common electrode, and the dotted line of the curve represents the delayed driving voltage.

8 is a schematic diagram showing a delay between signal electrodes on a general liquid crystal panel, in which 'tpc' represents a time delay caused by a common electrode occurring on the horizontal axis, and 'tps' represents a time delay caused by a segment electrode occurring on the vertical axis. 'D (tpc + tps)' represents the time delay occurring in the cells in the lower right region.

As such, the time delay occurring in the driving electrodes is low in the case of the medium-sized display device of the conventional 5-6 inch class, and the problem due to the delay is not serious because the application time of each electrode is relatively higher than the line delay. In this case, the resolution increases, so that each electrode application time is short and the line delay is relatively large. Therefore, in the conventional method for solving this problem, the auxiliary driving integrated circuit devices such as 8 'and 9' shown in FIG. However, this method not only requires additional circuitry but also does not completely solve the RMS value unevenness caused by the line delay. In particular, this problem is more serious when a frame rate control (FRC) method is used to implement line data on, off, and gray scale.

Accordingly, an object of the present invention is to provide a delay compensation driving method of a liquid crystal display device which compensates for non-uniformity of pixel applied voltage due to line delay in a simple matrix driving method in order to solve the conventional problems as described above.

Another object of the present invention is to compensate the delay of the liquid crystal display device in which a delay resistor is added to the driving integrated circuit device to compensate for the non-uniformity of the pixel applied voltage due to the line delay in the simple matrix driving method in order to solve the conventional problems as described above. It is to provide a driving method.

Another object of the present invention is to change the width and length of the output wiring pattern of the driving integrated circuit device to compensate for the non-uniformity of the human pixel applied voltage due to the line delay in the simple matrix driving method to solve the conventional problems as described above. A delay compensation driving method of a liquid crystal display device is provided.

In order to achieve the above object, the method of the present invention is an n × m simple matrix driving method comprising n common electrodes and m segment electrodes, wherein the common electrode is used to compensate for the delay caused by the common electrode and the segment electrode. The delay is compensated for by inserting a blank period corresponding to the delay into the driving voltage applied to the data voltage and the data voltage applied to the segment electrode.

In order to achieve the above object, the device of the present invention is a simple matrix driving device comprising a common electrode driving integrated circuit device for driving n common electrodes, a segment driving integrated circuit device for driving m segment electrodes, and an n × m liquid crystal panel. In the liquid crystal display method according to the method, the timing for enabling the common electrode driving buffer is delayed by inserting n-1 delay resistors into the common electrode driving buffer of the common electrode driving integrated circuit device, and the segment electrode driving integration is performed. The timing of enabling the segment driving buffer is delayed by inserting m-1 delay resistors into the segment driving buffer of the circuit device.

In order to achieve the above object, the device of the present invention is a simple matrix consisting of a common electrode driving integrated circuit device for driving n common electrodes, a segment driving integrated circuit device for driving m segment electrodes, and an n × m liquid crystal panel. A liquid crystal display method using a driving method, comprising: varying a length of an output of the common electrode driving integrated circuit device and a line connecting the liquid crystal panel to compensate for a delay occurring in the common electrode, and driving the segment electrode driving integrated circuit device. Compensating the delay occurring in the segment electrode by varying the output and the length of the wiring connecting the liquid crystal panel.

Next, the apparatus of the present invention will be described in detail with reference to the accompanying drawings.

The present invention is to solve the luminance unevenness and flicker phenomenon of the screen caused by the pixel voltage unevenness due to the line delay in the simple matrix display device, the line of the driving electrodes formed on the liquid crystal panel Considering the delay, it can be operated at the correct timing.

9A to 9C are waveform diagrams showing blanks inserted into signal voltages of a common electrode and a segment electrode according to the present invention, where 'tp' represents a driving pulse width of the common electrode modified by the present invention, and 'tb' 'Represents the delay time by the electrode and blank is inserted by the delay time. 9A shows the drive signal of the i-th common electrode, FIG. 9B shows the drive signal of the i + l-th common electrode, and FIG. 9C shows the data signal of the segment electrode synchronized with the blank period to compensate for the delay time of the common electrode. It is shown. In Fig. 9C, 'B' represents a blank, and it can be seen that the blank B is inserted into the on, off, and off data. In other words, a blank period is provided for the driving signal of the common electrode and the data signal of the segment electrode to eliminate the line overlap due to the line delay. In addition, in order to realize accurate timing, a signal of an orthogonal electrode is output in accordance with the delay of the driving electrode on the liquid crystal panel. Therefore, the output voltage levels of the common electrode and the segment electrode are at least three or more. 9A to 9C, the inter-line crosstalk caused by the line delay is eliminated by providing a blank period between the drive signals. At this time, the blank period coincides with the signal delay time of the electrode having the longest delay, and this driving method prevents overlap of data between lines.

Therefore, in the case of the conventional APT driving method, the common signal may be three levels, and the blank period may have a voltage lower than the intermediate level or the low level. At this time, the DC component remaining on the screen can be removed. The voltage level maintained in the blank period of the common electrode must match the voltage level in the blank period of the data signal of the segment electrode. The blank period for each pixel is designed to be identical at the common electrode segment and the segment electrode stage. That is, both the common electrode and the segment electrode signal should have at least three levels of voltage.

FIG. 10 is a circuit diagram showing an embodiment of compensating for time delay according to the present invention, wherein resistors R ₁ to R _{n −} are applied to terminal inputs that enable the output buffers of the drive integrated circuit devices 8 and 9 of FIG. 3. ₁ ) Insert the appropriately delay the enable timing to correct the delay effect caused by the liquid crystal panel. That is, the output signal applied to each electrode end is time delayed in consideration of the line propagation delay. When applied to the first common electrode, the first electrode is applied at the same time, and the second electrode to the last electrode is time-shifted in the output signal of the segment in consideration of a constant delay ratio. In order to realize this, a polyresist layer is inserted into the latch signal terminal 20 of the output terminal of the driving integrated circuit device so that the outputs O1 to On of the output buffers B1 to Bn corresponding to the respective pixels obtain a time delay. This delays the control signal by a certain ratio.

FIG. 11 is a block diagram showing another embodiment of compensating time delay according to the present invention, where '21' represents a segment electrode driving integrated circuit device, '22' represents a common electrode driving integrated circuit device, and '23' 'Indicates wiring connecting the segment driving integrated circuit device and the liquid crystal cell, and' 24 'indicates wiring connecting the common electrode driving integrated circuit device and the liquid crystal cell. In FIG. 1, the time delay compensates the delay time by varying the lengths of the wirings 23 and 24 connecting the respective driving integrated circuit devices 21 and the liquid crystal cell 25. FIG. That is, the latch signal is connected to the metal line so that the output signal is output from the buffers B1 to Bn without delay, and the scan time is controlled by adjusting the length and width of the ITO electrode at the output connection part of the liquid crystal panel and the driving integrated circuit device. How to adjust. In this way, one frame time is' tp x n 'in the conventional case, and one frame time is' (tp' + tb) x n '.

In addition to the method of compensating for the delay time in this manner, there is also a method of modifying the waveform of the signal voltage. That is, an output signal composed of frequency components that can pass through the low pass filter (sinusoidal wave, etc.) in order to improve the error between the voltage unevenness between pixels due to the line delay and the maximum RMS value on the opposite side of the output of the driving integrated circuit device. By using), the RMS error is minimized between the left and right panels and between the top and bottom of the panel.

As described above, the driving method according to the present invention can be applied not only to the existing APT driving method but also to the HAT and the active driving method which are the multi-line driving method. That is, when the corner electrode driving signals are used as orthogonal Fn, a blank period B may be provided between each Fn to maintain display timing.

As described above, the inter-line data interference due to the line delay during driving according to the present invention can be completely eliminated, and the crosstalk of the RMS value between the lines according to the on / off conversion for one pixel when FRC gray scale is realized By eliminating talk, it is possible to improve data unevenness and improve unevenness of luminance due to line delay.

Claims (2)

A liquid crystal display method according to a simple matrix driving method comprising a common electrode driving integrated circuit device for driving n common electrodes, a segment driving integrated circuit device for driving m segment electrodes, and an n × m liquid crystal panel. The timing of enabling the common electrode driving buffer is delayed by inserting n-1 delay resistors into the common electrode driving buffer of the integrated integrated circuit device, and m-1 delaying to the segment driving buffer of the segment electrode driving integrated circuit device. And delaying the timing of enabling the segment driving buffer by inserting a resistor. A liquid crystal display method according to a simple matrix driving method comprising a common electrode driving integrated circuit device for driving n common electrodes, a segment driving integrated circuit device for driving m segment electrodes, and an n × m liquid crystal panel. Compensating the delay occurring in the common electrode by varying the length of the line connecting the output of the driving integrated circuit device and the liquid crystal panel, and the length of the line connecting the output of the segment electrode driving integrated circuit device and the liquid crystal panel. And varying and compensating for a delay occurring in the segment electrode.