KR100237324B1 - Inner lead clamp construction of wire bonding system for manufacturing semiconductor package and wire bonding method thereof - Google Patents

Inner lead clamp construction of wire bonding system for manufacturing semiconductor package and wire bonding method thereof Download PDF

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KR100237324B1
KR100237324B1 KR1019970032796A KR19970032796A KR100237324B1 KR 100237324 B1 KR100237324 B1 KR 100237324B1 KR 1019970032796 A KR1019970032796 A KR 1019970032796A KR 19970032796 A KR19970032796 A KR 19970032796A KR 100237324 B1 KR100237324 B1 KR 100237324B1
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South Korea
Prior art keywords
wire bonding
lead frame
wire
die pad
clamp
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KR1019970032796A
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Korean (ko)
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KR19990010137A (en
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김수진
이민우
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김규현
아남반도체주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Abstract

본 발명은 반도체 패키지 제조용 와이어 본딩 장비의 인너리드 클램프 구조 및 이를 이용한 와이어 본딩 방법에 관한 것으로, 반도체칩의 칩패드와 인너리드를 와이어로 본딩하기 위하여 사용하는 클램프에 적어도 두 개 이상의 윈도우를 리드프레임이 이송되는 방향으로 형성하고, 이 클램프를 사용하여 리드프레임을 한 번 로딩 한 상태에서 적어도 두 개 이상의 다이패드영역을 와이어 본딩하도록 함으로서 생산성을 향상시킬 수 있도록 된 것이다.The present invention relates to an inner lead clamp structure of a wire bonding device for manufacturing a semiconductor package and a wire bonding method using the same, wherein at least two windows are connected to a clamp used to bond a chip pad and an inner lead of a semiconductor chip to a wire. It is formed in the conveying direction, and by using this clamp to wire-bond at least two or more die pad area in the state of loading the lead frame once, it is possible to improve the productivity.

Description

반도체 패키지 제조용 와이어 본딩 장비의 인너리드 클램프 구조 및 이를 이용한 와이어 본딩 방법Inner lead clamp structure of wire bonding equipment for semiconductor package manufacturing and wire bonding method using same

본 발명은 반도체 패키지 제조용 와이어 본딩 장비의 인너리드 클램프 구조 및 이를 이용한 와이어 본딩 방법에 관한 것으로, 더욱 상세하게는 반도체칩의 칩패드와 인너리드를 와이어로 본딩하기 위하여 사용하는 클램프에 적어도 두 개 이상의 윈도우를 리드프레임이 이송되는 방향으로 형성하고, 이 클램프를 사용하여 리드프레임을 한 번 로딩 한 상태에서 적어도 두 개 이상의 다이패드영역을 와이어 본딩하도록 함으로서 생산성을 향상시킬 수 있도록 된 것이다.The present invention relates to an inner lead clamp structure of a wire bonding device for manufacturing a semiconductor package and a wire bonding method using the same, and more particularly, to at least two clamps used to bond a chip pad and an inner lead of a semiconductor chip with a wire. The window can be formed in the direction in which the lead frame is transported, and the clamp can be used to wire-bond at least two die pad areas in a state where the lead frame is loaded once, thereby improving productivity.

일반적으로 반도체 패키지는 리드프레임의 칩탑재판 위에 에폭시를 사용하여 전자회로가 집적되어 있는 반도체칩을 부착시킨 후, 상기 반도체칩의 전자회로 단자인 칩패드와 리드프레임의 인너리드를 와이어로 본딩하고, 이러한 리드프레임을 반도체칩의 회로부분과 주변 구성품들을 외부의 충격 및 접촉으로 부터 보호하고, 외관상 제품의 형태를 소정형상으로 형성시키기 위해 컴파운드재로 몰딩하여 완성한다.In general, a semiconductor package attaches a semiconductor chip in which electronic circuits are integrated by using an epoxy on a chip mounting plate of a lead frame, and then bonds the chip pad, which is an electronic circuit terminal of the semiconductor chip, with an inner lead of a lead frame with a wire. In addition, the lead frame is completed by molding a compound material in order to protect the circuit portion and peripheral components of the semiconductor chip from external impact and contact, and to form a product shape in appearance.

상기 반도체칩의 칩패드와 인너리드를 와이어로 본딩할 때, 본딩력을 향상시키기 위하여 리드프레임을 히터블럭에 안착시켜 리드프레임의 다이패드영역(와이어 본딩될 리드프레임이 위치되는 영역)에 위치한 반도체칩의 저면에 열을 전달하여 와이어 본딩시 그 본딩력을 향상시키는 것이다. 또한, 상기한 인너리드의 선단부 상면은 클램프로 고정시킨 상태에서 와이어 본딩을 함으로서 와이어 본딩시 인너리드들이 움직이는 것을 방지하는 것이다.When bonding the chip pad and the inner lead of the semiconductor chip with a wire, the semiconductor is located in the die pad region of the lead frame (the region where the lead frame to be wire bonded is located) by seating the lead frame on the heater block to improve the bonding force. By transferring heat to the bottom of the chip to improve the bonding force during wire bonding. In addition, the upper surface of the distal end of the inner lead is wire-bonded in a clamped state to prevent the inner lead from moving during wire bonding.

이와같이 인너리드의 선단부를 고정하는 종래의 클램프는 와이어 본딩되는 영역이 개방되는 하나의 윈도우가 형성되어 인너리드의 선단부를 클램프하는 것이다. 또한, 상기한 반도체칩이 부착되어 있는 리드프레임은 히터블럭에 안착되어 반도체칩의 저면에 열을 전달시킴으로서 와이어 본딩을 용이하게 하는 것이다.As described above, in the conventional clamp for fixing the leading end of the inner lead, a window is formed in which an area for wire bonding is opened to clamp the leading end of the inner lead. In addition, the lead frame to which the semiconductor chip is attached is mounted on the heater block to facilitate heat bonding by transferring heat to the bottom of the semiconductor chip.

그러나, 이러한 종래의 클램프는 와이어 본딩을 위한 하나의 윈도우가 형성되어 있음으로서 리드프레임을 한 번 로딩 한 상태에서 하나의 다이패드영역을 와이어 본딩하도록 함으로서 생산성이 떨어지는 단점이 있었던 것이다.However, this conventional clamp has a disadvantage in that productivity is reduced by allowing one die pad area to be wire-bonded in a state in which a lead frame is loaded once because one window for wire bonding is formed.

본 발명의 목적은 이와같은 문제점을 해소하기 위하여 발명된 것으로서, 반도체칩의 칩패드와 인너리드를 와이어로 본딩하기 위하여 인너리드의 선단부 상면을 고정하는 클램프에 적어도 두 개 이상의 윈도우를 리드프레임이 이송되는 방향으로 형성하여 리드프레임을 한번 로딩한 생태에서 적어도 두 개 이상의 다이패드영역을 와이어본딩함으로서 생산성을 향상 시킬 수 있도록 된 반도체 패키지 제조용 와이어 본딩 장비의 인너리드 클램프 구조 및 이를 이용한 와이어 본딩 방법을 제공함에 있다.An object of the present invention has been invented to solve this problem, the lead frame transfers at least two or more windows to a clamp for fixing the top surface of the tip of the inner lead in order to bond the chip pad and the inner lead of the semiconductor chip with a wire Provides an inner lead clamp structure of wire bonding equipment for semiconductor package manufacturing and wire bonding method using the same, which can improve productivity by wire bonding at least two die pad areas in an ecology in which a lead frame is loaded once by forming in a direction Is in.

도 1은 본 발명이 적용되는 와이어 본딩 장비의 전체 구조를 나타낸 사시도1 is a perspective view showing the overall structure of the wire bonding equipment to which the present invention is applied

도 2는 본 발명에 따른 와이어 본딩 장비의 클램프 구조를 나타낸 평면도Figure 2 is a plan view showing the clamp structure of the wire bonding equipment according to the present invention

도 3은 본 발명에 따른 와이어 본딩 상태를 나타낸 도면3 is a view showing a wire bonding state according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 와이어 본딩 클램프 11 : 윈도우10: wire bonding clamp 11: window

11a, 11b, : 제1,2 윈도우 20 : 히터블럭11a, 11b, 1st, 2nd window 20: heater block

이하, 본 발명을 첨부된 도면을 참조하여 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도 1은 본 발명이 적용되는 와이어 본딩 장비의 전체 구조를 나타낸 사시도이다. 도시된 바와같이 본 발명이 적용되는 와이어 본딩 장비는 리드프레임을 적층시킨 매거진에서 리드프레임을 하나씩 공급하는 인풋(A ; Input)과, 상기한 인풋(A)에서 공급된 리드프레임을 와이어로 본딩하는 와이어본딩부(C)와, 상기한 와이어본딩부(C)에서 와이어본딩된 리드프레임을 배출하는 아웃풋(B ; Output)으로 크게 구성된다.1 is a perspective view showing the overall structure of the wire bonding equipment to which the present invention is applied. As shown in the drawing, the wire bonding apparatus to which the present invention is applied is an input (A) for supplying lead frames one by one in a magazine in which lead frames are stacked, and for bonding the lead frames supplied from the input (A) with wires. The wire bonding unit C and an output B for discharging the lead frame wire-bonded from the wire bonding unit C are large.

또한, 상기한 와이어본딩부(C)에서 와이어본딩을 할 수 있도록 조작하는 조작부(D)가 정면에 설치되어 있고, 상기한 와이어본딩부(C)에서 와이어본딩되는 것을 확인할 수 있도록 모니터(E)가 정면 상부에 설치되어 있다.In addition, the monitor (E) so that it can be confirmed that the operation unit (D) for operating the wire bonding in the wire bonding unit (C) is installed in the front, and the wire bonding in the wire bonding unit (C). Is installed at the front upper part.

상기한 와이어 본딩 장비의 와이어본딩부(C)에 설치되어 와이어본딩을 하는 것으로, 도 2는 본 발명에 따른 와이어 본딩 장비의 클램프 구조를 나타낸 평면도이고, 도 3은 본 발명에 따른 와이어 본딩 상태를 나타낸 도면이다. 도시된 바와같이 본 발명에 따른 클램프의 구조는 리드프레임의 칩탑재판(31)에 부착된 반도체칩(40)의 저면으로 열을 전달할 수 있도록 상기한 리드프레임이 안착되는 히터블럭(20)과, 상기 히터블럭(20)에 안착된 리드프레임의 인너리드(32) 선단부를 고정하도록 테두리의 저면으로 클램퍼(12)가 돌출되는 윈도우(11)가 형성된 와이어 본딩 클램프(10)에 있어서, 상기한 클램프(10)에는 와이어 본딩되는 영역이 개방되는 윈도우(11)를 적어도 두 개 이상의 제1 윈도우(11a)와 제2 윈도우(11b) 및 제n 윈도우로 구분되도록 형성하되, 상기한 윈도우(11)는 리드프레임이 이송되는 방향으로 형성되며, 상기한 리드프레임의 다이패드영역의 피치와 동일한 간격으로 형성되는 것을 특징으로 하는 것이다.Installed in the wire bonding portion (C) of the wire bonding equipment to wire bonding, Figure 2 is a plan view showing a clamp structure of the wire bonding equipment according to the present invention, Figure 3 is a wire bonding state according to the present invention The figure shown. As shown, the structure of the clamp according to the present invention includes a heater block 20 on which the lead frame is seated so as to transfer heat to the bottom surface of the semiconductor chip 40 attached to the chip mounting plate 31 of the lead frame. In the wire bonding clamp 10 having a window 11 protruding the clamper 12 to the bottom of the rim to fix the leading end of the inner lead 32 of the lead frame seated on the heater block 20, The clamp 10 is formed to be divided into at least two first windows 11a, second windows 11b, and n-th windows, wherein the window 11 in which the wire-bonded area is opened is divided into the windows 11. Is formed in the direction in which the lead frame is conveyed, and is formed at the same interval as the pitch of the die pad region of the lead frame.

이와같은 구성의 본 발명에 따른 와이어 본딩방법은, 유니트 단위로 다이패드영역(와이어 본딩될 리드프레임이 위치되는 영역)이 형성된 리드프레임을 적어도 두 개 이상의 다이패드영역이 히터블럭(20)에 위치하도록 리드프레임을 이송시키는 리드프레임 로딩단계와, 상기한 리드프레임 로딩단계에 의해 히터블럭에 적어도 두 개 이상의 다이패드영역이 위치되면 이를 와이어 본딩 클램프(10)에 형성된 적어도 두 개 이상의 제1 윈도우(11a)와 제2 윈도우(11b) 및 제n 윈도우로 동시에 클램프하는 단계와, 상기한 와이어 본딩 클램프(10)에 의해 클램프된 리드프레임의 적어도 두 개 이상의 다이패드영역 중에서 제1 윈도우(11a)에 위치한 다이패드영역에 있는 반도체칩의 전자회로 단자인 칩패드와 리드프레임의 인너리드(32)를 와이어로 본딩하는 제1 와이어본딩 단계와, 상기한 제1 와이어본딩 단계 후에 제2 윈도우(11b)에 위치한 다이패드영역에 있는 반도체칩의 전자회로 단자인 칩패드와 리드프레임의 인너리드(32)를 와이어로 본딩하는 제2 와이어본딩 단계와, 상기한 제2 와이어본딩 단계 후에 제n 윈도우에 위치한 다이패드영역에 있는 반도체칩의 전자회로 단자인 칩패드와 리드프레임의 인너리드를 와이어로 본딩하는 제n 와이어본딩 단계로 이루어지며 상기한 리드프레임 로딩단계와 클램프 하는 단계 및 와이어본딩 단계를 반복 수행하는 것을 특징으로 하는 것이다.In the wire bonding method according to the present invention having such a configuration, at least two or more die pad areas are positioned in the heater block 20 in a lead frame having a die pad area (area where the lead frame to be wire bonded is located) in units of units. And at least two first windows formed in the wire bonding clamp 10 when at least two die pad areas are positioned on the heater block by the lead frame loading step. Simultaneously clamping the second window 11b and the n-th window to the first window 11a of at least two die pad regions of the lead frame clamped by the wire bonding clamp 10. The first wire bonding the chip pad, which is an electronic circuit terminal of the semiconductor chip in the die pad area located, and the inner lead 32 of the lead frame with a wire. After bonding and after the first wire bonding step, a wire pad bonds the chip pad, which is an electronic circuit terminal of the semiconductor chip, in the die pad region located in the second window 11b, and the inner lead 32 of the lead frame. A wire bonding step and an n-th wire bonding step of bonding an inner lead of a lead frame and a chip pad, which is an electronic circuit terminal of a semiconductor chip, in a die pad region located in an n-th window after the second wire bonding step. And repeating the lead frame loading step, the clamping step, and the wire bonding step.

이와같이 구성된 본 발명은 와이어 본딩시 상기한 리드프레임을 적어도 두 개 이상의 다이패드영역이 이송되도록 하고, 이송된 리드프레임의 다이패드영역을 적어도 두 개 이상의 제1,2 윈도우(11a)(11b)가 형성된 클램프(10)로 동시에 클램프하여 제1 윈도우(11a)에서 먼저 와이어본딩을 실시하고, 다음에 제2 윈도우(11b)에서 와이어본딩을 실시함으로서 생산성을 향상 시킬 수 있는 것이다. 즉, 리드프레임을 한번 로딩한 상태로 적어도 두 개 이상의 다이패드영역에 각각 와이어본딩을 하는 것으로, 이와같이 와이어본딩을 할 수 있는 것은 상기한 와이어 본딩 클램프에 적어도 두 개 이상의 윈도우를 리드프레임이 이송되는 방향으로 형성함으로서 가능하다.According to the present invention configured as described above, at least two or more die pad regions are transferred to the lead frame during wire bonding, and at least two first and second windows 11a and 11b are used to transfer the die pad region of the transferred lead frame. Simultaneous clamping with the formed clamp 10 allows wire bonding first in the first window 11a and wire bonding in the second window 11b, thereby improving productivity. That is, wire bonding is performed on at least two die pad areas with the lead frame loaded once, and the wire bonding is performed by transferring the at least two windows to the wire bonding clamp. It is possible by forming in the direction.

이상의 설명에서 알 수 있듯이 본 발명에 의하면, 반도체칩의 칩패드와 인너리드를 와이어로 본딩하기 위하여 사용하는 클램프에 적어도 두 개 이상의 윈도우를 리드프레임이 이송되는 방향으로 형성하고, 이 클램프를 사용하여 리드프레임을 한 번 로딩 한 상태에서 적어도 두 개 이상의 다이패드영역을 와이어 본딩하도록 함으로서 생산성을 향상시킬 수 있는 효과가 있다.As can be seen from the above description, according to the present invention, at least two or more windows are formed in the clamp used to bond the chip pad and the inner lead of the semiconductor chip to the wire in the direction in which the lead frame is transported, Productivity can be improved by wire bonding at least two die pad regions while the lead frame is loaded once.

Claims (2)

리드프레임의 칩탑재판(31)에 부착된 반도체칩(40)의 저면으로 열을 전달할 수 있도록 상기한 리드프레임이 안착되는 히터블럭(20)과, 상기 히터블럭(20)에 안착된 리드프레임의 인너리드(32) 선단부를 고정하도록 테두리의 저면으로 클램퍼(12)가 돌출되는 윈도우(11)가 형성된 와이어 본딩 클램프(10)에 있어서, 상기한 클램퍼(10)는 대략 직사각판(rectangular plate)모양을 하는 일체의 몸체에 와이어 본딩되는 영역이 개방되는 윈도우(11)를 적어도 두 개 이상 구분되도록 형성하되, 상기한 윈도우(11)는 리드프레임이 이송되는 방향으로 형성하며, 상기한 리드프레임의 다이패드영역의 피치와 동일한 간격으로 형성한 것을 특징으로 하는 반도체 패키지 제조용 와이어 본딩 장비의 인너리드 클램프 구조.The heater block 20 on which the lead frame is seated so as to transfer heat to the bottom surface of the semiconductor chip 40 attached to the chip mounting plate 31 of the lead frame, and the lead frame seated on the heater block 20 In the wire bonding clamp 10 is formed with a window 11 protruding the clamper 12 to the bottom of the rim so as to fix the inner end of the inner lead 32, the clamper 10 is approximately a rectangular plate (rectangular plate) At least two windows 11 are formed to be divided into an integral body having a shape in which wire bonding areas are opened, wherein the windows 11 are formed in a direction in which the lead frame is transported, An inner lead clamp structure of a wire bonding device for manufacturing a semiconductor package, characterized in that formed at the same interval as the pitch of the die pad region. 유니트 단위로 다이패드 영역(와이어 본딩될 리드프레임이 위치되는 영역)이 형성된 리드프레임을 적어도 두 개 이상의 다이패드영역이 히터블럭에 위치하도록 리드프레임을 이송시키는 리드프레임 로딩단계와, 상기한 리드프레임 로딩단계에 의해 히터블럭에 적어도 두 개 이상의 다이패드영역이 위치되면 이를 대략 직사각판(rectangular plate)모양을 하는 일체의 와이어 본딩 클램프에 형성된 적어도 두 개 이상의 윈도우로 동시에 클램프하는 단계와, 상기한 와이어 본딩 클램프에 의해 클램프된 리드프레임의 적어도 두 개 이상의 다이패드영역 중에서 어느 한 윈도우에 위치한 다이패드영역에 있는 반도체칩의 전자회로 단자인 칩패드와 리드프래임의 인너리드를 와이어로 본딩하는 제1와이어본딩 단계와, 상기한 제1와이어본딩 단계 후에 다른 윈도우에 위치한 다이패드영역에 있는 반도체칩의 전자회로 단자인 칩패드와 리드프레임의 인너리드를 와이어로 본딩하는 제2와이어본딩 단계로 이루어지며, 상기한 리드프레임 로딩 단계와 클램프 하는 단계 및 와이어본딩 단계를 반복 수행하는 것을 특징으로 하는 와이어 본딩 방법.A lead frame loading step of transferring a lead frame such that at least two die pad regions are located in a heater block, the lead frame having a die pad region (region where the lead frame to be wire bonded) is located in unit units; If at least two or more die pad areas are positioned on the heater block by the loading step, simultaneously clamping them to at least two or more windows formed in an integral wire bonding clamp in the shape of a rectangular plate; A first wire for bonding a chip pad, which is an electronic circuit terminal of a semiconductor chip, and an inner lead of a lead frame, in a die pad region located in a window among at least two die pad regions of a lead frame clamped by a bonding clamp, with a wire. Another win after the bonding step and the first wire bonding step described above. And a second wire bonding step of bonding the chip pad, which is an electronic circuit terminal of the semiconductor chip in the die pad region located at the right side, and the inner lead of the lead frame, with wires, the step of loading and clamping the lead frame, and the wire bonding step. Wire bonding method characterized in that to perform repeatedly.
KR1019970032796A 1997-07-15 1997-07-15 Inner lead clamp construction of wire bonding system for manufacturing semiconductor package and wire bonding method thereof KR100237324B1 (en)

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JPH08203948A (en) * 1995-01-23 1996-08-09 Fujitsu Ltd Wire bonding equipment and semiconductor device assembling method

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Publication number Priority date Publication date Assignee Title
JPH0330345A (en) * 1989-06-27 1991-02-08 Fujitsu Ltd Manufacture of semiconductor device
JPH08203948A (en) * 1995-01-23 1996-08-09 Fujitsu Ltd Wire bonding equipment and semiconductor device assembling method

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