JP3745190B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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JP3745190B2
JP3745190B2 JP2000113392A JP2000113392A JP3745190B2 JP 3745190 B2 JP3745190 B2 JP 3745190B2 JP 2000113392 A JP2000113392 A JP 2000113392A JP 2000113392 A JP2000113392 A JP 2000113392A JP 3745190 B2 JP3745190 B2 JP 3745190B2
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die pad
semiconductor chip
resin
lead frame
semiconductor device
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JP2000311979A (en
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昭彦 亀岡
加奈子 吉倉
美典 宮木
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Renesas Technology Corp
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Renesas Technology Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置に関し、特に、微細ピッチで多ピン化されたリードフレームを用いて製造される半導体装置に適用して有効な技術に関する。
【０００２】
【従来の技術】
最近のＬＳＩで代表される半導体装置は、小型化、高集積化、多機能化の要求が益々強くなってきているのに伴い、半導体チップが搭載されるリードフレームは、より一層微細ピッチで多ピン化されたものが用いられる傾向にある。
【０００３】
このように微細ピッチ化、多ピン化されたリードフレームは、例えば日経ＢＰ社発行、「ＶＬＳＩパッケージング技術（上）」、１９９３年５月３１日発行、Ｐ１５７に図示されている。このようなリードフレームは、半導体チップを搭載すべきダイパッドがダイパッド吊りリードを介してフレーム本体に支持されていて、ダイパッドの周囲には多数のインナーリードが配置された形状を有している。
【０００４】
このようなリードフレームを用いて樹脂封止型半導体装置を製造するには、ダイパッドに半導体チップを搭載した後、この半導体チップのパッド電極とインナーリードとの間にワイヤをボンディングして、これらリードフレーム、半導体チップ、ボンディングワイヤ及びインナーリードを、トランスファモールド法により樹脂製パッケージによって封止することが行われる。
【０００５】
このような微細ピッチ化、多ピン化されたリードフレームを用いて樹脂封止型半導体装置を製造する場合のパッケージ技術としては、ＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐａｃｋａｇｅ）、Ｔ（Ｔｈｉｎ）ＱＦＰ、ＳＯＰ（Ｓｍａｌｌ Ｏｕｔｌｉｎｅ Ｐａｃｋａｇｅ）等が広く採用されている。
【０００６】
ここで、前記のようなリードフレームに半導体チップを搭載する場合、半導体チップの位置決めを容易にするために、ダイパッド吊りリードの途中部分にプレス加工等によって折曲部を設けて、他の部分よりダイパッドを低い位置に支持するようにした形状のリードフレームが知られている。例えば日経ＢＰ社発行、「日経マイクロデバイス」、１９９０年６月号、Ｐ５３には、そのような形状のリードフレームを用いて製造された樹脂封止型半導体装置が図示されている。
【０００７】
【発明が解決しようとする課題】
前記のように途中部分に折曲部が設けられたダイパッド吊りリードを有するリードフレームを用いる場合は、ダイパッドの高さ位置にばらつきが生ずるという問題がある。
【０００８】
すなわち、ダイパッドの位置を低くするためにダイパッド吊りリードの途中部分に折曲部を設ける際、ダイパッド吊りリードに変形、反り等が発生して、このダイパッド吊りリードの高さ位置（ロケーション）にばらつきが生ずるので、結果的にダイパッドの高さ位置をばらつかせるようになる。このため、最悪の場合は、ダイパッドへの半導体チップの搭載（チップボンディング）が不可能になる。
【０００９】
このような問題は、リードフレームの標準化のために、ダイパッドの面積をこれに搭載すべき半導体チップの面積よりも小さく形成したリードフレームにおいても同様に生じ、この場合はダイパッド吊りリードが長くなることにより、このリードの強度が弱くなるので、その傾向は大きくなる。
【００１０】
また、このように微細ピッチで多ピン化されたリードフレームを用いて樹脂封止型半導体装置を製造する場合には、ダイパッドの高さ位置がばらつくことによって、樹脂封止時に未充填不良が発生し易いという問題がある。
【００１１】
すなわち、ダイパッドの高さ位置がばらつくと、半導体チップを搭載した後に樹脂封止を行うとき、ダイパッドの上方側あるいは下方側で完全に樹脂が充填されない部分が生じるようになる。このため、半導体チップあるいはダイパッドの一部がパッケージから露出するようになる。
【００１２】
このような問題は、最近特に要望の強くなっている薄型化パッケージにおいて多く発生しており、有効な解決策が望まれている。
【００１３】
本発明の目的は、リードフレームを用いて製造する場合、ダイパッドの高さ位置のばらつきを低減することによって、樹脂封止時に発生し易い未充填不良を防止するようにした樹脂封止型の半導体装置を提供することにある。
【００１４】
本発明の前記ならびにその他の目的と新規な特徴は、本明細書の記述及び添付図面から明らかになるであろう。
【００１５】
【課題を解決するための手段】
本願において開示される発明のうち、代表的なものの概要を簡単に説明すれば下記の通りである。
【００１６】
本発明の半導体装置の製造方法では、複数のリードと、途中部分に第１折り曲げ部分と該第１折り曲げ部分から連続する中間部分と該中間部分から連続する第２折り曲げ部分とから構成される折曲部を有し、該折曲部が他の部分よりも狭い幅となっている複数の吊りリードと、前記複数のリードとは異なる高さ位置に前記吊りリードで支持されるダイパッドとを有するリードフレームの該ダイパッドに半導体チップを搭載する第１の工程と、該第１の工程後に、前記半導体チップのパッド電極と前記複数のリードを電気的に接続する第２の工程と、該第２の工程後に、前記半導体チップを搭載した前記リードフレームをトランスファーモールド装置の上型と下型の間に挟持して、上型と下型の間の樹脂が充填される空間の側方に設けられたゲートから該空間内に樹脂を供給して、前記半導体チップを搭載した前記リードフレームの一部を樹脂封止する第３の工程とを有している。
【００１７】
上述した手段によれば、ダイパッドの高さ位置のばらつきを低減して、樹脂封止時に発生し易い未充填不良を防止することができる。
【００１８】
【発明の実施の形態】
以下図面を参照して本発明の実施の形態を説明する。
【００１９】
図１は本発明の実施の形態に用いられるリードフレームを示す上面図で、図２は図１のＡ−Ａ断面図である。リードフレーム１は、例えばＦｅ−Ｎｉ合金材料からなる方形状のダイパッド２が、この四方をダイパッド吊りリード３を介して図示しないフレーム本体に支持されている。ダイパッド２の周囲には多数のインナーリード５が配置されており、これらインナリード５の端部にはアウターリードが接続されている。これらインナーリード５及びアウターリードはダイパッド２及びダイパッド吊りリード３と一体化されて形成されている。
【００２０】
ダイパッド２に結合されている各ダイパッド吊りリード３の途中部分３Ａには折曲部６が設けられ、これによってダイパッド２はダイパッド吊りリード３の他の部分３Ｂより低い位置に支持されている。また、折曲部６は、特にダイパッド吊りリード３の他の部分３Ｂ及びダイパッド２に隣接する部分３Ｃよりも狭い幅Ｗに形成された細幅部７に設けられている。
【００２１】
このようなリードフレーム１は、次のような方法で製造される。
【００２２】
まず、図３に示すように、予め例えばＦｅ−Ｎｉ合金材料からなる板状部材を用いて、プレス法、エッチング法等の任意の加工手段によって、所望のパターンを有するリードフレーム１を形成する。すなわち、方形状のダイパッド２がこの四方をダイパッド吊りリード３を介して図示しないフレーム本体に支持され、かつダイパッド２の周囲に多数のインナーリード５が配置された形状のリードフレーム１を形成する。
【００２３】
次に、図４に示すように、各ダイパッド吊りリード３の途中部分３Ａに、他の部分３Ｂ及びダイパッド２に隣接する部分３Ｃよりも狭い幅Ｗの細幅部７を、プレス法、エッチング法等の任意の加工手段によって形成する。図６は図４のＡ−Ａ断面図を示している。あるいは、この細幅部７の形成は、図３の工程と同時に行うようにしても良い。
【００２４】
続いて、図５に示すように、各ダイパッド吊りリード３の途中位置３Ａに形成された細幅部７に、プレス法等の加工手段によって、いわゆるディプレス加工を施して折曲部６を形成する。これによって、ダイパッド２はダイパッド吊りリード３の他の位置３Ｂよりも低い位置に支持される。折曲部６はダイパッド吊りリード２の特に細幅部７を加工することにより形成するので、加工時にダイパッド吊りリード３にほとんど変形、反り等を発生させることなく形成することができる。図７は図５のＡ−Ａ断面図を示している。
【００２５】
このようなリードフレームによれば、次のような効果が得られる。
【００２６】
ダイパッド２をダイパッド吊りリード３の他の位置３Ｂよりも低い位置に支持する折曲部６は、特にダイパッド吊りリード３の他の部分３Ｂ及びダイパッド２に隣接する部分３Ｃよりも狭い幅Ｗの細幅部７に設けられるので、加工時にダイパッド吊りリード３にはほとんど変形、反り等が発生しないため、ダイパッド２の高さ位置のばらつきを低減することができる。これにより、ダイパッド２への半導体チップの搭載（チップボンディング）が不可能になるような事態は生じない。
【００２７】
図８は本発明の実施の形態による樹脂封止型半導体装置を示す上面図で、図９は図８のＡ−Ａ断面図、図１０は図８のＢ−Ｂ断面図である。樹脂封止型半導体装置８は、実施の形態１により得られたリードフレーム１を用いて、ダイパッド２に搭載された半導体チップ９と、この半導体チップ９のパッド電極１０とインナーリード５との間を電気的に接続するボンディングワイヤ１１と、リードフレーム１、半導体チップ９、ボンディングワイヤ１１及びインナーリード５を封止した樹脂製パッケージ１２とを有している。なお、図８においては、説明をわかり易くするために樹脂製パッケージ１２を取り除いた構造で示している。
【００２８】
次に、実施の形態による樹脂封止型半導体装置の製造方法を工程順に説明する。
【００２９】
まず、図１１（ａ）に示すように、前述した、途中部分３Ａに他の部分３Ｂよりダイパッド２を低い位置に支持し、かつ前記他の部分３Ｂ及びダイパッド２に隣接する部分３Ｃより狭い幅Ｗの部分に設けられた折曲部６を有するダイパッド吊りリード３を介してダイパッド２が支持されたリードフレーム１を用意する。
【００３０】
次に、図１１（ｂ）に示すように、ダイパッド２上にＡｕ−Ｓｉ共晶合金、Ａｇペースト等のろう材を介して、半導体チップ９を搭載（チップボンディング）する。
【００３１】
続いて、図１１（ｃ）に示すように、半導体チップ９のパッド電極１０とインナーリード５との間にＡｕ線のようなワイヤ１１をボンディングする。このワイヤボンディングは周知のように行い、複数のパッド電極１０とインナーリード５との間を、キャピラリー１３を往復させて、対応するもの同士を接続する。
【００３２】
次に、図１１（ｄ）に示すように、半導体チップ９、ボンディングワイヤ１１及びインナーリード５を含むリードフレーム１を、トランスファモールド装置の上型１４と下型間に挟持して、ゲート１６から矢印のように流体状の樹脂を供給する。これによって、上型１４と下型１５間の空間内には樹脂が充填されるので、図８に示すように樹脂製パッケージ１２で封止された樹脂封止型半導体装置８が得られる。
【００３３】
このような実施の形態の樹脂封止型半導体装置によれば、次のような効果が得られる。
【００３４】
途中部分３Ａに他の部分３Ｂよりダイパッド２を低い位置に支持し、かつ前記他の部分３Ｂ及びダイパッド２に隣接する部分３Ｃより狭い幅Ｗの部分に設けられた折曲部６を有するダイパッド吊りリード３を介してダイパッド２が支持されたリードフレーム１を用いて、このダイパッド２に半導体チップ９を搭載するので、ダイパッド２の高さ位置のばらつきが低減されていることにより、リードフレームを用いて製造する場合、樹脂封止時に発生し易い未充填不良を防止することができる。これにより、ダイパッド２の上方側あるいは下方側で完全に樹脂が充填されるようになるので、半導体チップ９あるいはダイパッド２の一部がパッケージ１２から露出するようなことはなくなる。従って、薄型化パッケージに適用して有効となる。
【００３５】
以上、本発明者によってなされた発明を、前記実施の形態に基づき具体的に説明したが、本発明は、前記実施の形態に限定されるものではなく、その要旨を逸脱しない範囲において種々変更可能であることは勿論である。
【００３６】
例えば、ダイパッドを支持するダイパッド吊りリードは必ずしもダイパッドの四方に設ける必要はなく、二方のような任意の方向に設けることができる。
【００３７】
また、折曲部は各ダイパッド吊りリードに対して１個に限らず、複数個設けるようにしても良い。
【００３８】
以上の説明では主として本発明者によってなされた発明をその背景となった利用分野であるリードフレームを用いた樹脂封止型の半導体装置の技術に適用した場合について説明したが、それに限定されるものではない。本発明は、少なくともダイパッドがダイパッド吊りリードによって支持される条件のものには適用できる。
【００３９】
【発明の効果】
本願において開示される発明のうち代表的なものによって得られる効果を簡単に説明すれば、下記の通りである。
【００４１】
ダイパッドをダイパッド吊りリードを介して支持するリードフレームを用いて樹脂封止型半導体装置を製造する場合、樹脂封止時に発生し易い未充填不良を防止することができる。
【図面の簡単な説明】
【図１】本発明の実施の形態に用いられるリードフレームを示す上面図である。
【図２】図１のＡ−Ａ断面図である。
【図３】リードフレームの製造方法の一工程を示す上面図である。
【図４】リードフレームの製造方法の他の工程を示す上面図である。
【図５】リードフレームの製造方法のその他の工程を示す上面図である。
【図６】図４のＡ−Ａ断面図である。
【図７】図５のＡ−Ａ断面図である。
【図８】本発明の実施の形態である樹脂封止型半導体装置を示す上面図である。
【図９】図８のＡ−Ａ断面図である。
【図１０】図８のＢ−Ｂ断面図である。
【図１１】本発明の実施の形態である樹脂封止型半導体装置の製造方法を工程順に示すもので、（ａ）乃至（ｄ）は断面図である。
【符号の説明】
１…リードフレーム、２…ダイパッド、３…ダイパッド吊りリード、３Ａ…ダイパッド吊りリードの途中部分、３Ｂ…ダイパッド吊りリードの他の部分、３Ｃ…ダイパッド吊りリードのダイパッドに隣接する部分、５…インナーリード、６…折曲部、７…細幅部、８…半導体装置、９…半導体チップ、１０…パッド電極、１１…ボンディングワイヤ、１２…樹脂製パッケージ、１３…キャピラリー、１４…上型、１５…下型、１６…ゲート。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly, to a technique effective when applied to a semiconductor device manufactured using a lead frame having a multi-pin structure at a fine pitch.
[0002]
[Prior art]
As semiconductor devices represented by recent LSIs are increasingly required to be miniaturized, highly integrated, and multifunctional, the number of lead frames on which semiconductor chips are mounted is further increased at finer pitches. There is a tendency to use pinned ones.
[0003]
Such a lead frame with a fine pitch and a large number of pins is illustrated in, for example, P157 issued by Nikkei BP, “VLSI packaging technology (above)”, issued May 31, 1993. Such a lead frame has a shape in which a die pad on which a semiconductor chip is to be mounted is supported by a frame body via a die pad suspension lead, and a large number of inner leads are arranged around the die pad.
[0004]
In order to manufacture a resin-encapsulated semiconductor device using such a lead frame, after mounting a semiconductor chip on a die pad, a wire is bonded between the pad electrode of the semiconductor chip and an inner lead, and these leads A frame, a semiconductor chip, a bonding wire, and an inner lead are sealed with a resin package by a transfer molding method.
[0005]
As a packaging technique for manufacturing a resin-encapsulated semiconductor device using such a fine pitch and multi-pin lead frame, QFP (Quad Flat Package), T (Thin) QFP, SOP (Small Outline) are available. Package) is widely adopted.
[0006]
Here, when a semiconductor chip is mounted on the lead frame as described above, in order to facilitate the positioning of the semiconductor chip, a bent portion is provided in the middle portion of the die pad suspension lead by press working or the like, A lead frame having a shape that supports a die pad at a low position is known. For example, “Nikkei Microdevice”, published in Nikkei BP, June 1990, P53, shows a resin-encapsulated semiconductor device manufactured using such a lead frame.
[0007]
[Problems to be solved by the invention]
As described above, when a lead frame having a die pad suspension lead provided with a bent portion in the middle is used, there is a problem that variations occur in the height position of the die pad.
[0008]
That is, when a bent portion is provided in the middle of the die pad suspension lead to lower the die pad position, the die pad suspension lead is deformed, warped, etc., and the height position (location) of the die pad suspension lead varies. As a result, the height position of the die pad can be varied. For this reason, in the worst case, it becomes impossible to mount the semiconductor chip on the die pad (chip bonding).
[0009]
Such a problem also occurs in a lead frame in which the die pad area is made smaller than the area of the semiconductor chip to be mounted for standardization of the lead frame, and in this case, the die pad suspension lead becomes long. As a result, the strength of the lead is weakened, and the tendency is increased.
[0010]
In addition, when manufacturing a resin-encapsulated semiconductor device using a lead frame with multiple pins at such a fine pitch, the height of the die pad varies, resulting in unfilled defects during resin encapsulation. There is a problem that it is easy to do.
[0011]
That is, when the height position of the die pad varies, when resin sealing is performed after the semiconductor chip is mounted, a portion where the resin is not completely filled is formed on the upper side or the lower side of the die pad. For this reason, a part of the semiconductor chip or die pad is exposed from the package.
[0012]
Such problems frequently occur in thin packages that have recently become particularly demanded, and an effective solution is desired.
[0013]
An object of the present invention is to provide a resin-encapsulated semiconductor that prevents unfilling defects that are likely to occur during resin encapsulation by reducing variations in the height position of the die pad when manufacturing using a lead frame. To provide an apparatus.
[0014]
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.
[0015]
[Means for Solving the Problems]
Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
[0016]
In the method of manufacturing the semiconductor device of the present invention, folding comprised of a plurality of leads, the intermediate portion and the second bent portion continuous from the intermediate portion which is continuous from the first bent portion and the first bent portion in the middle portion It has a curved portion, and a die pad the bent portion is supported by the suspension leads to different height positions in a plurality of suspension leads that have a narrower width than other portions, and the plurality of leads A first step of mounting a semiconductor chip on the die pad of a lead frame; a second step of electrically connecting a pad electrode of the semiconductor chip and the plurality of leads after the first step; After the step, the lead frame on which the semiconductor chip is mounted is sandwiched between the upper mold and the lower mold of the transfer mold apparatus, and is provided on the side of the space filled with the resin between the upper mold and the lower mold. Tage By supplying the resin in the space from the bets, and a portion of the lead frame equipped with the semiconductor chip and a third step of resin encapsulation.
[0017]
According to the above means, to reduce the variation in the height position of the da Ipaddo, it can be prevented easily unfilled defects generated during resin sealing.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0019]
FIG. 1 is a top view showing a lead frame used in the embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line AA of FIG. In the lead frame 1, for example, a rectangular die pad 2 made of, for example, an Fe—Ni alloy material is supported by a frame body (not shown) through the die pad suspension lead 3 on all four sides. A large number of inner leads 5 are arranged around the die pad 2, and outer leads are connected to ends of the inner leads 5. These inner leads 5 and outer leads are formed integrally with the die pad 2 and the die pad suspension lead 3.
[0020]
A bent portion 6 is provided in the middle portion 3A of each die pad suspension lead 3 coupled to the die pad 2, whereby the die pad 2 is supported at a position lower than the other portion 3 B of the die pad suspension lead 3. In addition, the bent portion 6 is provided in a narrow width portion 7 formed with a narrower width W than the other portion 3B of the die pad suspension lead 3 and the portion 3C adjacent to the die pad 2 in particular.
[0021]
Such a lead frame 1 is manufactured by the following method.
[0022]
First, as shown in FIG. 3, a lead frame 1 having a desired pattern is formed in advance by an arbitrary processing means such as a press method or an etching method using a plate-like member made of, for example, an Fe—Ni alloy material. That is, a square die pad 2 is supported by a frame body (not shown) through four sides of the die pad suspension lead 3, and a lead frame 1 having a shape in which a large number of inner leads 5 are arranged around the die pad 2 is formed.
[0023]
Next, as shown in FIG. 4, a narrow portion 7 having a width W narrower than the other portion 3 </ b> B and the portion 3 </ b> C adjacent to the die pad 2 is formed in the middle portion 3 </ b> A of each die pad suspension lead 3. It forms by arbitrary processing means, such as. FIG. 6 is a cross-sectional view taken along the line AA in FIG. Alternatively, the narrow width portion 7 may be formed simultaneously with the process of FIG.
[0024]
Subsequently, as shown in FIG. 5, a so-called depressing process is performed on the narrow width part 7 formed in the middle position 3 </ b> A of each die pad suspension lead 3 by a processing means such as a press method to form a bent part 6. To do. Thus, the die pad 2 is supported at a position lower than the other position 3B of the die pad suspension lead 3. Since the bent portion 6 is formed by processing the narrow-width portion 7 of the die pad suspension lead 2 in particular, the bending portion 6 can be formed with almost no deformation, warpage or the like in the die pad suspension lead 3 during processing. FIG. 7 shows a cross-sectional view taken along the line AA of FIG.
[0025]
According to such a lead frame, the following effects can be obtained.
[0026]
The bent portion 6 that supports the die pad 2 at a lower position than the other position 3B of the die pad suspension lead 3 is narrower than the other portion 3B of the die pad suspension lead 3 and the portion 3C adjacent to the die pad 2 in particular. Since it is provided in the width portion 7, the die pad suspension lead 3 is hardly deformed or warped at the time of processing, so that variations in the height position of the die pad 2 can be reduced. As a result, a situation in which mounting of a semiconductor chip (chip bonding) on the die pad 2 becomes impossible does not occur.
[0027]
8 is a top view showing a resin-encapsulated semiconductor device according to an embodiment of the present invention, FIG. 9 is a cross-sectional view taken along line AA in FIG. 8, and FIG. 10 is a cross-sectional view taken along line BB in FIG. The resin-encapsulated semiconductor device 8 uses the lead frame 1 obtained according to the first embodiment, and the semiconductor chip 9 mounted on the die pad 2 and between the pad electrode 10 and the inner lead 5 of the semiconductor chip 9. And a resin package 12 in which the lead frame 1, the semiconductor chip 9, the bonding wire 11 and the inner lead 5 are sealed. In FIG. 8, the structure is shown with the resin package 12 removed for easy understanding.
[0028]
Next, a method for manufacturing a resin-encapsulated semiconductor device according to the embodiment will be described in the order of steps.
[0029]
First, as shown in FIG. 11 (a), the intermediate portion 3A supports the die pad 2 at a lower position than the other portion 3B, and has a width narrower than the other portion 3B and the portion 3C adjacent to the die pad 2. A lead frame 1 is prepared in which the die pad 2 is supported via a die pad suspension lead 3 having a bent portion 6 provided in the W portion.
[0030]
Next, as shown in FIG. 11B, a semiconductor chip 9 is mounted (chip bonding) on the die pad 2 via a brazing material such as an Au—Si eutectic alloy or Ag paste.
[0031]
Subsequently, as shown in FIG. 11C, a wire 11 such as an Au wire is bonded between the pad electrode 10 of the semiconductor chip 9 and the inner lead 5. This wire bonding is performed in a known manner, and the corresponding ones are connected by reciprocating the capillary 13 between the plurality of pad electrodes 10 and the inner leads 5.
[0032]
Next, as shown in FIG. 11 (d), the lead frame 1 including the semiconductor chip 9, the bonding wire 11 and the inner lead 5 is sandwiched between the upper mold 14 and the lower mold of the transfer mold apparatus, and from the gate 16. Supply fluid resin as shown by the arrow. As a result, the space between the upper mold 14 and the lower mold 15 is filled with resin, so that the resin-encapsulated semiconductor device 8 sealed with the resin package 12 as shown in FIG. 8 is obtained.
[0033]
According to the resin-encapsulated semiconductor device of such an embodiment, the following effects can be obtained.
[0034]
A die pad suspension having a bent portion 6 provided in a portion having a width W narrower than a portion 3C adjacent to the other portion 3B and the die pad 2 while supporting the die pad 2 at a lower position than the other portion 3B in the middle portion 3A. Since the semiconductor chip 9 is mounted on the die pad 2 using the lead frame 1 in which the die pad 2 is supported via the leads 3, the variation in the height position of the die pad 2 is reduced, so that the lead frame is used. In the case of manufacturing, it is possible to prevent unfilled defects that are likely to occur during resin sealing. As a result, the resin is completely filled above or below the die pad 2, so that the semiconductor chip 9 or part of the die pad 2 is not exposed from the package 12. Therefore, it is effective when applied to a thin package.
[0035]
Although the invention made by the present inventor has been specifically described based on the above-described embodiment, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention. Of course.
[0036]
For example, the die pad suspension leads that support the die pad are not necessarily provided in four directions of the die pad, and can be provided in any direction such as two directions.
[0037]
The number of bent portions is not limited to one for each die pad suspension lead, and a plurality of bent portions may be provided.
[0038]
In the above description, the case where the invention made mainly by the present inventor is applied to the technology of a resin-encapsulated semiconductor device using a lead frame, which is a field of use behind the invention, has been described. is not. The present invention is applicable to a condition where at least the die pad is supported by the die pad suspension lead.
[0039]
【The invention's effect】
The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
[0041]
When manufacturing a resin-encapsulated semiconductor device using a lead frame that supports a die pad via a die-pad suspension lead, it is possible to prevent unfilled defects that are likely to occur during resin encapsulation.
[Brief description of the drawings]
FIG. 1 is a top view showing a lead frame used in an embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along the line AA of FIG.
FIG. 3 is a top view showing one process of a manufacturing method of a lead frame.
FIG. 4 is a top view showing another process of the lead frame manufacturing method.
FIG. 5 is a top view showing another process of the lead frame manufacturing method.
6 is a cross-sectional view taken along the line AA in FIG.
7 is a cross-sectional view taken along the line AA in FIG.
FIG. 8 is a top view showing a resin-encapsulated semiconductor device according to an embodiment of the present invention.
9 is a cross-sectional view taken along the line AA in FIG.
10 is a cross-sectional view taken along the line BB in FIG.
FIGS. 11A to 11D show a method for manufacturing a resin-encapsulated semiconductor device according to an embodiment of the present invention in the order of steps, and FIGS. 11A to 11D are cross-sectional views. FIGS.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Lead frame, 2 ... Die pad, 3 ... Die pad suspension lead, 3A ... Middle part of die pad suspension lead, 3B ... Other part of die pad suspension lead, 3C ... Part adjacent to die pad of die pad suspension lead, 5 ... Inner lead , 6 ... bent portion, 7 ... narrow width portion, 8 ... semiconductor device, 9 ... semiconductor chip, 10 ... pad electrode, 11 ... bonding wire, 12 ... resin package, 13 ... capillary, 14 ... upper die, 15 ... Lower mold, 16 ... Gate.

Claims (5)

複数のリードと、途中部分に第１折り曲げ部分と該第１折り曲げ部分から連続する中間部分と該中間部分から連続する第２折り曲げ部分とから構成される折曲部を有し、該折曲部が他の部分よりも狭い幅となっている複数の吊りリードと、前記複数のリードとは異なる高さ位置に前記吊りリードで支持されるダイパッドとを有するリードフレームの該ダイパッドに半導体チップを搭載する第１の工程と、
該第１の工程後に、前記半導体チップのパッド電極と前記複数のリードを電気的に接続する第２の工程と、該第２の工程後に、前記半導体チップを搭載した前記リードフレームをトランスファーモールド装置の上型と下型の間に挟持して、上型と下型の間の樹脂が充填される空間の側方に設けられたゲートから該空間内に樹脂を供給して、前記半導体チップを搭載した前記リードフレームの一部を樹脂封止する第３の工程とを有することを特徴とする樹脂封止型半導体装置の製造方法。A plurality of leads, have a configured folded portion from the first bent portion and the second bent portion continuous from the intermediate portion and the intermediate portion which is continuous from the first bent portion in the middle portion, the bent portion mounting There a plurality of suspension leads that have a narrower width than other portions, the semiconductor chip to the die pad of a lead frame having a die pad supported by the suspension leads to different heights from said plurality of leads A first step of:
After the first step, a second step of electrically connecting the pad electrode of the semiconductor chip and the plurality of leads, and after the second step, the lead frame mounting the semiconductor chip is transferred to a transfer mold apparatus. The semiconductor chip is sandwiched between an upper die and a lower die, and resin is supplied into the space from a gate provided on the side of the space filled with the resin between the upper die and the lower die. And a third step of resin-sealing a part of the mounted lead frame. A method for manufacturing a resin-encapsulated semiconductor device, comprising: 前記ダイパッド上にはＡｇペーストを介して前記半導体チップを搭載することを特徴とする請求項１に記載の半導体装置の製造方法。  The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor chip is mounted on the die pad via an Ag paste. 前記半導体チップのパッド電極と前記複数のリードとはボンディングワイヤによって電気的に接続されることを特徴とする請求項１又は２に記載の半導体装置の製造方法。  3. The method of manufacturing a semiconductor device according to claim 1, wherein the pad electrode of the semiconductor chip and the plurality of leads are electrically connected by bonding wires. 前記半導体チップのパッド電極は、前記半導体チップの周辺部に複数形成されていることを特徴とする請求項１乃至３の何れか１項に記載の半導体装置の製造方法。  4. The method of manufacturing a semiconductor device according to claim 1, wherein a plurality of pad electrodes of the semiconductor chip are formed in a peripheral portion of the semiconductor chip. 5. 前記ダイパッドは露出することなく樹脂封止されることを特徴とする請求項１乃至４の何れか１項に記載の半導体装置の製造方法。  The method of manufacturing a semiconductor device according to claim 1, wherein the die pad is resin-sealed without being exposed.
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