KR100219055B1 - Forming method for contact hole of semiconductor device - Google Patents

Abstract

The present invention relates to a method for forming a fine contact hole that exceeds the resolution limit of a photolithography process using a multilayer sacrificial film having different etching selectivity, and solves a short circuit problem with other conductive films generated as a semiconductor device becomes highly integrated. By preventing the delay in the lower process, there is an effect of improving the characteristics of the device, prevention of defects and high integration of the device.

Description

Method of forming fine contact hole in semiconductor device

1a to 1f is a process chart for forming a contact hole according to an embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

100: silicon substrate 4: interlayer oxide film

5: first polysilicon film 6: first oxide film

7: second polysilicon film 8: nitride film

9: photoresist pattern 10: second oxide film

The present invention relates to a method for forming a contact hole with a fine size of a desired size in order to secure a space margin when forming a contact hole such as a storage node contact hole or a bit line contact hole of a highly integrated semiconductor device during a manufacturing process of a semiconductor device. .

Due to the high integration of semiconductor devices, the space between patterns in the chip is gradually decreasing, and thus the contact hole size must be made smaller, but the current photolithography process is limited by the resolution.

In other words, in the past, where the degree of integration is low, there is a space in which a contact is formed, and thus a contact hole is formed without a problem. However, as the degree of integration becomes higher, there is no space in the contact hole forming space. The formation of holes creates various problems, such as damage to other materials in the surroundings.

An object of the present invention is to provide a method for forming a fine contact hole of a semiconductor device having a fine size corresponding to a highly integrated semiconductor device.

In order to achieve the above object, the present invention provides a method of manufacturing a semiconductor device, comprising: sequentially forming an interlayer insulating film and a second conductive film on a first conductive film; A first sacrificial film having an etch selectivity different from the second conductive film, a second sacrificial film having an etch selectivity with the first sacrificial film, the first sacrificial film, and the second sacrificial film on the second conductive film Sequentially forming a third sacrificial layer having an etch selectivity with the film; Forming a photoresist pattern covering the contact portion; Dry etching the third and second sacrificial layers sequentially using the photoresist pattern as an etch barrier; Selectively partially wet etching the second sacrificial layer; Removing the third sacrificial layer; Forming a fourth sacrificial film having an etch selectivity with the second sacrificial film on the entire structure, and etching back the fourth sacrificial film to expose the upper surface of the second sacrificial film; Selectively etching the second sacrificial layer; Removing the etched-back fourth sacrificial layer while completely etching the first sacrificial layer exposed by the etching of the second sacrificial layer; Selectively etching the second conductive film exposed by the etching of the first sacrificial film; And removing the second sacrificial film while forming a contact hole through which the predetermined portion of the first conductive film is exposed by dry etching the interlayer insulating film exposed by the etching of the second conductive film. .

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

The present invention is a method of forming a fine contact hole using materials having different etching ratio characteristics, and looks at the contact hole forming process according to an embodiment of the present invention through FIGS. La to 1f.

First, a transistor is formed by forming a gate oxide film 1, a gate electrode 2, an insulating film spacer 3, and a source / drain (not shown) on the silicon substrate 100 as shown in FIG. The oxide film 4 is formed. Subsequently, a first polysilicon film 5 impregnated with impurities is formed on the interlayer oxide film 4, and the first oxide film 6 and the second polysilicon film 7 are impurity added or not. None), and the nitride film 8 is formed in turn, and then a photoresist pattern 9 is formed covering the portion where the contact hole is to be formed.

Subsequently, as shown in FIG. 1B, the nitride film 8 and the second polysilicon film 7 are sequentially dry-etched using the photoresist pattern 9 as an etch barrier, and then the photoresist pattern 9 is removed.

Subsequently, as shown in FIG. 1C, the second polysilicon film 8 is partially wet-etched using an etching selectivity between the nitride film 7 and the second polysilicon film 8. At this time, the degree of wet etching of the second polysilicon film 8 is performed until the second polysilicon film 8 having the same size as the desired contact hole remains.

Subsequently, as illustrated in FIG. 1D, the nitride film 8 is removed through dry or wet etching using an etching selectivity with the nitride film 8, the second polysilicon film 7, and the first oxide film 6. This excellent second oxide film 10 (for example, a material such as BPSG) is deposited and then etched back by dry or wet etching until the second polysilicon film 7 is exposed.

Subsequently, as shown in FIG. 1E, the second polysilicon layer 7 is removed using the etching selectivity of the second polysilicon layer 7 and the second oxide layer 10, and then the exposed first oxide layer is dry etched.

Here, when the first oxide film 6 is selectively dry etched, the second oxide film 10 is also simultaneously etched.

Subsequently, the first polysilicon film 5 is dry-etched using the etching selectivity of the first polysilicon film 5 and the first oxide film 6 as shown in FIG. 1f, and then the interlayer oxide film 4 is dried. Dry etching is performed until the surface of the silicon substrate 100 is exposed. Here, the first oxide layer is also simultaneously removed during dry etching of the interlayer oxide layer 4, and the first polysilicon layer 5 is present as it is due to the etching selectivity of the interlayer oxide layer 4 and the first polysilicon layer 5. Done.

According to the present invention as described above, the size of the contact hole can be formed irrespective of the resolution of the photolithography process, thereby preventing the short-circuit problem with the other conductive film generated as the semiconductor device becomes highly integrated in the lower process, thereby preventing the characteristics of the device. There is an effect of improving, preventing defects and increasing the integration of the device.

As described above, the present invention is a method of forming a fine contact hole using materials having different etching ratio characteristics. In the present embodiment, the first oxide film 6, the second polysilicon film 7, and the nitride film ( 8) and the second oxide film 10 are used as sacrificial films, but it is apparent that other sacrificial films considering an etching selectivity may be used.

Although the technical spirit of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation.

In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

Claims (6)

A method of manufacturing a semiconductor device, comprising: sequentially forming a second insulating film (4) and a second conductive film (5) on a first conductive film (100); A first sacrificial film 6 having an etch rate different from the second conductive film on the second conductive film, a second sacrificial film 7 having a different etching rate from the first sacrificial film 7, and the first sacrificial film And sequentially forming a third sacrificial film (8) having an etching rate different from that of the second sacrificial film; Forming a photoresist pattern 9 covering the contact portion; Dry etching the third and second sacrificial layers sequentially using the photoresist pattern as an etch barrier; Selectively wet etching the second sacrificial layer; Removing the third sacrificial layer; Forming a fourth sacrificial film (10) having an etching selectivity different from that of the second sacrificial film on the entire structure, and etching back the fourth sacrificial film to expose the upper surface of the second sacrificial film; Selectively etching the second sacrificial layer; Removing the etched-back fourth sacrificial layer while completely etching the first sacrificial layer exposed by the etching of the second sacrificial layer; Selectively etching the second conductive film exposed by the etching of the first sacrificial film; And a contact hole in which a predetermined portion of the first conductive film is exposed by dry etching the interlayer insulating film exposed by the etching of the second conductive film. And removing the second sacrificial layer while forming the micro contact hole. The method of claim 1, wherein the second conductive film is a doped polysilicon film. The method of claim 2, wherein the first sacrificial film is an oxide film. 4. The method of claim 3, wherein the second sacrificial film is a polysilicon film. The method of claim 4, wherein the third sacrificial film is a nitride film. 6. The method of claim 5, wherein the fourth sacrificial film is a BPSG film.