KR0172536B1 - Method for forming metal wiring - Google Patents
Method for forming metal wiring Download PDFInfo
- Publication number
- KR0172536B1 KR0172536B1 KR1019950065629A KR19950065629A KR0172536B1 KR 0172536 B1 KR0172536 B1 KR 0172536B1 KR 1019950065629 A KR1019950065629 A KR 1019950065629A KR 19950065629 A KR19950065629 A KR 19950065629A KR 0172536 B1 KR0172536 B1 KR 0172536B1
- Authority
- KR
- South Korea
- Prior art keywords
- photomask
- aluminum layer
- metal wiring
- reflection film
- diffuse reflection
- Prior art date
Links
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 22
- 239000002184 metal Substances 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 title claims abstract description 20
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 31
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 31
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 35
- 239000011229 interlayer Substances 0.000 claims description 10
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 230000007547 defect Effects 0.000 abstract description 6
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 7
- 238000005530 etching Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 230000008642 heat stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
본 발명은 금속배선을 형성하기 위한 포토마스크 작업이 공정상의 문제로 포토마스크 재작업을 요구할 때, 크랙이 발생된 난반사막을 CF4가스로 제거하고, 현상액으로 알루미늄층의 표면부를 제거하고, 새로운 난반사막을 알루미늄층상에 형성하고, 이후 포토마스크 재작업을 실시한다.According to the present invention, when the photomask operation for forming the metal wiring requires a photomask rework due to a process problem, the cracked diffuse reflection film is removed with CF 4 gas, the surface portion of the aluminum layer is removed with a developer, and the new diffuse reflection The film is formed on an aluminum layer and then photomask reworked.
따라서, 본 발명은 금속배선을 형성하기 위한 포토마스크 재작업시 발생되는 링 디펙트 발생요인을 제거하여 반도체 소자의 신뢰성을 향상시킬 수 있다.Therefore, the present invention can improve the reliability of the semiconductor device by eliminating the ring defect generation factor generated during the photomask rework for forming the metal wiring.
Description
제1a 및 1b도는 종래 금속배선의 포토마스크 재작업시 문제점을 설명하기 위한 소자의 단면도.1A and 1B are cross-sectional views of a device for explaining a problem in reworking a photomask of a conventional metal wiring.
제2a 내지 2d도는 본 발명의 실시예에 따라 금속배선의 포토마스크 재작업을 설명하기 위한 소자의 단면도.2A through 2D are cross-sectional views of devices for explaining photomask rework of metallization in accordance with an embodiment of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1, 11 : 실리콘 기판 2, 12 : 층간 절연막1, 11: silicon substrate 2, 12: interlayer insulating film
3, 13 : 알루미늄층 4, 14, 14A : 난반사막3, 13: aluminum layer 4, 14, 14A: diffuse reflection film
5, 15 : 크랙 6, 16 : Al2O3층5, 15: crack 6, 16: Al 2 O 3 layer
10 : 링 디펙트 17 : 포토마스크10: ring defect 17: photomask
본 발명은 반도체 소자의 금속배선 형성방법에 관한 것으로, 특히 금속배선 형성공정에서 포토마스크 재작업시 발생되는 링 디펙트(ring defect)를 제거할 수 있는 반도체 소자의 금속배선 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming metal wiring of a semiconductor device, and more particularly, to a method for forming metal wiring of a semiconductor device capable of eliminating ring defects generated during photomask rework in a metal wiring forming process.
종래의 금속배선 형성공정시 공정상의 문제로 포토마스크 재작업을 실시해야 경우가 있다. 그런데, 난반사막(Ti + TiN)은 열 스트레스(thermal stress)에 약하기 때문에 어떤 부분에 크랙(crack)이 발생하게 되고, 크랙이 발생된 부분의 알루미늄 표면에 Al2O3층이 형성된다. 이로인하여 포토마스크 재작업으로 알루미늄층을 패턴닝한 후에는 기판에 링 디펙트가 발생된다. 이를 제1a 및 1b도를 참조하여 설명하면 다음과 같다.In the conventional metallization forming process, a photomask rework may be required due to a process problem. However, because the diffuse reflection film (Ti + TiN) is weak to thermal stress (crack) is generated in a portion, the Al 2 O 3 layer is formed on the aluminum surface of the crack generated portion. This results in ring defects on the substrate after the aluminum layer is patterned by photomask rework. This will be described with reference to FIGS. 1a and 1b as follows.
제1a 및 1b도는 종래 금속배선의 포토마스크 재작업시 문제점을 설명하기 위한 소자의 단면도이다. 층간 절연막(2)이 형성된 실리콘 기판(1)이 제공되고, 층간 절연막(2)상에 알루미늄층(3)이 형성되고, 알루미늄층(3)상에 Ti + TiN으로 된 난반사막(4)이 형성된다. 알루미늄층(3)을 패턴닝하여 금속배선을 형성하기 위한 포토마스크 작업이 진행되는데, 이때 공정상의 문제로 포토마스크 재작업을 실시해야할 경우가 발생할 수 있다. 그런데, 난반사막(4)은 열 스트레스에 약하기 때문에 제1a도에 도시된 바와 같이 난반사막(4)의 어떤 부분에 크랙(5)이 발생되고, 이 크랙(5)부분의 알루미늄층(3)의 표면에 Al2O3층(6)이 형성된다. 이후 포토마스크 재작업시 Al2O3층(6)이 식각 마스크로 작용하여 제1b도에 도시된 바와같이 금속배선 형성을 위한 알루미늄층(3) 식각후에 층간 절연막(2)상에 링 디펙트(10)가 발생하게 되어 소자의 신뢰성을 저하시키게 된다.1A and 1B are cross-sectional views of a device for explaining a problem in reworking a photomask of a conventional metal wiring. A silicon substrate 1 on which an interlayer insulating film 2 is formed is provided, an aluminum layer 3 is formed on the interlayer insulating film 2, and a diffuse reflection film 4 of Ti + TiN is formed on the aluminum layer 3. Is formed. A photomask operation for patterning the aluminum layer 3 to form a metal wiring is performed. In this case, a photomask rework may be required due to a process problem. However, since the diffuse reflection film 4 is vulnerable to heat stress, cracks 5 are generated in a portion of the diffuse reflection film 4, as shown in FIG. 1A, and the aluminum layer 3 of the crack 5 portions. On the surface of the Al 2 O 3 layer 6 is formed. When the photomask is reworked, the Al 2 O 3 layer 6 acts as an etching mask, and as shown in FIG. 1b, the ring defect on the interlayer insulating film 2 is etched after etching the aluminum layer 3 for forming metal wiring. (10) is generated, which lowers the reliability of the device.
따라서, 본 발명은 금속배선을 형성하기 위한 포토마스크 재작업시 형성되는 Al2O3층을 제거하므로써, 상기한 문제점을 해결할 수 있는 반도체 소자의 금속배선 형성방법을 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming a metal wiring of a semiconductor device which can solve the above problems by removing the Al 2 O 3 layer formed during the photomask rework for forming the metal wiring.
이러한 목적을 달성하기 위한 본 발명은 층간 절연막이 형성된 실리콘 기판이 제공되고, 상기 층간 절연막상에 알루미늄층과 Ti + TiN으로 된 난반사막이 형성되고, 포토마스크 작업을 통해 상기 난반사막 및 상기 알루미늄층을 패턴닝하여 금속배선을 형성하는 반도체 소자의 금속배선 형성방법에 있어서, 상기 포토마스크 작업이 공정상의 문제로 인하여 포토마스크 재작업을 실시하기 위하여, 상기 포토마스크를 제거한 후, 상기 난반사막을 제거하는 단계 : 상기 알루미늄층의 표면부분을 제거하는 단계 : 상기 표면부가 제거된 알루미늄층상에 새로운 Ti + TiN으로 된 난반사막을 형성하는 단계 : 및 상기 새로운 난반사막 및 상기 표면부가 제거된 알루미늄층을 포토마스크 재작업을 통해 패턴닝하는 단계를 포함하는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a silicon substrate on which an interlayer insulating film is formed, and a diffuse reflection film made of an aluminum layer and Ti + TiN is formed on the interlayer insulating film, and the diffuse reflection film and the aluminum layer are formed through a photomask operation. In the method of forming a metal wiring of the semiconductor device to form a metal wiring by patterning, in order to perform the photomask rework due to the process of the photomask operation, removing the diffuse reflection film after removing the photomask Removing a surface portion of the aluminum layer; forming a diffused reflection film made of Ti + TiN on the removed aluminum layer; and reworking the photomask with the new diffused reflection film and the aluminum layer from which the surface portion is removed. It characterized in that it comprises a patterning through.
이하, 본 발명을 첨부된 도면을 참조하여 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제2a 내지 2d도는 본 발명의 실시예에 따라 금속배선의 포토마스크 재작업을 설명하기 위한 소자의 단면도이다.2A through 2D are cross-sectional views of devices for describing photomask rework of metal wirings according to embodiments of the present invention.
제2a도를 참조하면, 층간 절연막(12)이 형성된 실리콘 기판(11)이 제공되고, 층간 절연막(12)상에 알루미늄층(13)이 형성되고, 알루미늄층(13)상에 Ti + TiN으로 된 난반사막(14)이 형성된다. 알루미늄층(13)을 패턴닝하여 금속배선을 형성하기 위한 포토마스크 작업이 진행되는데, 이때 공정상의 문제로 포토마스크 재작업을 실시해야할 경우가 발생할 수 있다. 그런데, 난반사막(14)은 열 스트레스에 약하기 때문에 난반사막(14)의 어떤 부분에 크랙(15)이 발생되고, 이 크랙(15)부분의 알루미늄층(13)의 표면에 Al2O3층(16)이 형성된다.Referring to FIG. 2A, a silicon substrate 11 having an interlayer insulating film 12 is provided, an aluminum layer 13 is formed on the interlayer insulating film 12, and Ti + TiN is formed on the aluminum layer 13. Diffused reflection film 14 is formed. The photomask operation for patterning the aluminum layer 13 to form metal wiring is performed. In this case, a photomask rework may be required due to a process problem. However, since the diffuse reflection film 14 is vulnerable to thermal stress, cracks 15 are generated in a portion of the diffuse reflection film 14, and the Al 2 O 3 layer is formed on the surface of the aluminum layer 13 in the crack 15 portion. 16 is formed.
제2b도는 포토마스크를 제거한 후 CF4가스를 이용하여 크랙(15)이 발생된 난반사막(14)을 제거한 것이 도시된다.2B shows that after removing the photomask, the diffuse reflection film 14 in which the crack 15 is generated is removed using CF 4 gas.
제2c도는 현상(develop)액을 이용하여 알루미늄층(13)을 일정깊이 예를들어, 100 내지 500Å의 두께(점선으로 처리한 부분)만큼 제거한 것이 도시된다. 이로인하여 알루미늄층(13) 표면에 형성된 Al2O3층(16)이 제거된다.FIG. 2C shows that the aluminum layer 13 is removed by a developer for a predetermined depth, for example, by a thickness of 100 to 500 kPa (dotted portion) using a developer. As a result, the Al 2 O 3 layer 16 formed on the surface of the aluminum layer 13 is removed.
제2d도는 알루미늄층(13)상에 Ti + TiN으로 된 난반사막(14A)을 다시 형성한 후, 재 형성된 난반사막(14A)상에 포토마스크(17)를 형성하여 금속배선을 형성하기 위한 포토마스크 재작업이 실시되는 것이 도시된다.FIG. 2D is a photo for forming a metal wiring by forming a photomask 17 on the reshaped diffuse reflection film 14A after forming the diffuse reflection film 14A made of Ti + TiN again on the aluminum layer 13 It is shown that a mask rework is performed.
상술한 바와같이 본 발명은 금속배선을 형성하기 위한 포토마스크작업이 공정상의 문제로 포토마스크재작업을 요구할 때, 크랙이 발생된 난반사막을 CF4가스로 제거하고, 현상액으로 알루미늄층 표면부를 제거하고, 새로운 난반사막을 알루미늄층상에 형성하고, 이후 포토마스크 재작업을 실시한다.As described above, according to the present invention, when the photomask operation for forming the metal wiring requires the photomask rework due to a process problem, the cracked diffuse reflection film is removed with CF 4 gas, and the surface of the aluminum layer is removed with a developer. A new diffuse reflection film is formed on the aluminum layer, and then the photomask rework is performed.
따라서, 본 발명은 금속배선을 형성하기 위한 포토마스크 재작업시 발생되는 링 디펙트 발생요인을 제거하여 반도체 소자의 신뢰성을 향상시킬 수 있다.Therefore, the present invention can improve the reliability of the semiconductor device by eliminating the ring defect generation factor generated during the photomask rework for forming the metal wiring.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950065629A KR0172536B1 (en) | 1995-12-29 | 1995-12-29 | Method for forming metal wiring |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950065629A KR0172536B1 (en) | 1995-12-29 | 1995-12-29 | Method for forming metal wiring |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970052431A KR970052431A (en) | 1997-07-29 |
KR0172536B1 true KR0172536B1 (en) | 1999-03-30 |
Family
ID=19447107
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950065629A KR0172536B1 (en) | 1995-12-29 | 1995-12-29 | Method for forming metal wiring |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0172536B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010058541A (en) * | 1999-12-30 | 2001-07-06 | 박종섭 | A method for forming metal wire in semiconductor device |
-
1995
- 1995-12-29 KR KR1019950065629A patent/KR0172536B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR970052431A (en) | 1997-07-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR20000003969A (en) | Method of forming metal wire in semiconductor device using reflecting preventive film of titanium aluminum nitride | |
KR0172536B1 (en) | Method for forming metal wiring | |
KR100282417B1 (en) | Method for manufacturing semiconductor device | |
KR100517910B1 (en) | Metal wiring structure of semiconductor device and manufacturing method thereof | |
KR100261151B1 (en) | Method for forming contact hole | |
KR100215874B1 (en) | Process for fabricating semiconductor device | |
KR0137619B1 (en) | Manufacturing method of semiconductor device | |
KR0144140B1 (en) | Metal wiring method | |
KR100204009B1 (en) | Manufacturing method of semiconductor device | |
KR100431308B1 (en) | Method of manufacturing semiconductor device for preventing bonding failure in assembling process | |
KR960008095B1 (en) | Method of micro patterning using organo arc layer | |
KR0144019B1 (en) | Forming method of metal connection in semiconductor | |
KR100309133B1 (en) | Method for manufacturing metal interconnection of semiconductor device | |
KR100541671B1 (en) | Method of manufacturing semiconductor device | |
KR0137813B1 (en) | Metal wiring method of mosfet | |
KR0172232B1 (en) | Method of forming metal pattern | |
KR20030049563A (en) | Method for forming via hole | |
KR100248340B1 (en) | Manufacturing method of semiconductor device | |
KR100467496B1 (en) | Method for fabricating semiconductor | |
JPH06163451A (en) | Manufacture of semiconductor device | |
KR960043119A (en) | Via hole formation method of semiconductor device | |
KR19990085434A (en) | Pad open method of semiconductor device | |
KR19980052471A (en) | Manufacturing Method of Semiconductor Device | |
KR19980049907A (en) | Method of forming flow preventing film of interlayer insulating film | |
KR19980038893A (en) | Manufacturing method of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20060920 Year of fee payment: 9 |
|
LAPS | Lapse due to unpaid annual fee |