KR0141962B1 - Transistor having triple base structure and manufacturing method thereof - Google Patents
Transistor having triple base structure and manufacturing method thereofInfo
- Publication number
- KR0141962B1 KR0141962B1 KR1019890018568A KR890018568A KR0141962B1 KR 0141962 B1 KR0141962 B1 KR 0141962B1 KR 1019890018568 A KR1019890018568 A KR 1019890018568A KR 890018568 A KR890018568 A KR 890018568A KR 0141962 B1 KR0141962 B1 KR 0141962B1
- Authority
- KR
- South Korea
- Prior art keywords
- base
- transistor
- manufacturing
- epitaxial layer
- concentration
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 5
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 4
- 238000002513 implantation Methods 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 210000000813 small intestine Anatomy 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
Abstract
내용없음No content
Description
제1도 (a)(b)는 종래 NPN형 바이폴라 트랜지스터의 단면구조도 및 불순물 원소의 농도 그래프.1 (a) and (b) are cross-sectional structural diagrams and concentration graphs of impurity elements of a conventional NPN type bipolar transistor.
제2도는 종래 구조에 따른 파괴전압(BV)그래프.2 is a breakdown voltage (BV) graph according to a conventional structure.
제3도는 본 발명에 의한 트랜지스터의 단면구조도.3 is a cross-sectional structure diagram of a transistor according to the present invention.
제4도 (a)(b)는 종래기술과 본 발명에 의한 소장의 접합 길이에 따른 농도구배 그래프.Figure 4 (a) (b) is a graph of concentration gradient according to the junction length of the small intestine according to the prior art and the present invention.
*도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
1:제1베이스 2:제2베이스1: first base 2: second base
3:제3베이스 4:에미터3: 3rd base 4: emitter
5:n에피텍셜층 6:아이소레이션5: n epitaxial layer 6: isolation
7:P서브스트레이트 8:금속 접점7: P-substraight 8: metal contact
본 발명은 트랜지스터 및 그 제조방법에 관한 것으로, 특히 바이폴라 트랜지스터의 특성 특성 향상을 위한 고압소자의 제작에 적합하도록 한 것으로, 트랜지스터의 베이스 구조를 삼중구조로 형성한 트리플 베이스 구조를 가지는 트랜지스터 및 그 제조방법에 관한 것이다.The present invention relates to a transistor and a method of manufacturing the same, and in particular to be suitable for the fabrication of a high-voltage device for improving the characteristic characteristics of a bipolar transistor, a transistor having a triple base structure formed of a triple structure of the base structure of the transistor and its manufacture It is about a method.
종래의 NPN형 바이폴라 트랜지스터는 제1도(a)에 도시한 바와같이, P서브스트레이트(11)위에 N에피텍셜층(12)을 성장시키고, 아이솔레이션(isolation) 공정으로 N에피텍셜층을 격리시킨 다음 P베이스(13)를 형성하고 n+ 에미터(14)를 만든다.In the conventional NPN type bipolar transistor, as shown in FIG. 1 (a), the N epitaxial layer 12 is grown on the P substrate 18, and the N epitaxial layer is isolated by an isolation process. Then form a P base 13 and make an n + emitter 14.
제1도(b)는 트랜지스터의 활동영역에서 직선 A-B를 따라서 농도의 분포를 나타낸 것으로 도면에서 부호 S는 계단접합, G는 경사접합을 보이고 있다.FIG. 1 (b) shows the distribution of concentrations along a straight line A-B in the active region of the transistor. In the drawing, reference numeral S denotes a step junction and G indicates a gradient junction.
여기서 베이스의 농도를 고려하기 위하여 베이스와 콜렉터 사이의 접합(junetion)의 경우만을 생각하기로 한다.Here, only the case of junction between the base and the collector is considered to consider the concentration of the base.
종래의 구조 및 그 특성변화에서 콜렉터(15)의 백그라운드 농도(CB)와 베이스(13) 주입불순물의 농도 사이의 농도구배를 α라고 하면, 다음식과 같이 나타나고If the concentration gradient between the background concentration (CB) of the collector 15 and the concentration of the base 13 injection impurity in the conventional structure and its characteristic change is represented by α,
상기 농도구배 α의 값이 작을수록, 즉 급격한 농도구배가 아닌 완만한 농도구배를 가질수록 파괴전압(breakdown voltage)가 증가하는 특성을 가지고 있다(제2도 참조).The smaller the value of the concentration gradient α, that is, the slower the concentration gradient than the sudden concentration gradient, the characteristic is that the breakdown voltage increases (see FIG. 2).
따라서 본 발명은 종래의 방법을 탈피하여 베이스 접합깊이(base junction depth)가 고전압용 소자(device) 경우에 베이스의 농도구배가 완만하게 되도록 트피플(triple) 구조의 베이스를 가지는 트랜지스터 및 그 제조방법을 제공하기 위한 것이다.Accordingly, the present invention provides a transistor having a base structure having a triple structure so that the concentration gradient of the base is smooth when the base junction depth is a high voltage device away from the conventional method. It is to provide.
본 발명은 고내압 바이폴라 소자 제작시 요구되는 조건 즉, 에피텍셜두께(Tepi)가 약 19μm 이상이고, 베이스 접합깊이가 5μm 이상일 경우에 RSB(Base Sheet Resistance) 값을 200-350Ω/sg의 값을 가질 경우 활성영역을 NPN 구조로 하는 경우에 고내압 특성을 향상시킨 것으로 베이스를 제1베이스, 제2베이스, 제3베이스 3개의 영역으로 나누어 제작함으로써 농도의 크기가 제1베이스제2베이스제3베이스가 되도록 하여 제1베이스의 최하부 베이스층의 농도를 콜렉터 에피텍셜층의 농도와 거의 비슷하게 유지한 바이폴라 소자 및 그 제조방법을 제공한다.In the present invention, when the conditions required for fabricating a high breakdown voltage bipolar device, that is, the epitaxial thickness (Tepi) is about 19 μm or more, and the base junction depth is 5 μm or more, the RSB (Base Sheet Resistance) value is set to 200-350 kPa / sg. In case of having the NPN structure in the active region, high breakdown voltage characteristics were improved, and the base was divided into three regions of the first base, the second base, and the third base. Provided is a bipolar device in which the concentration of the lowermost base layer of the first base is approximately equal to that of the collector epitaxial layer so as to be a base, and a method of manufacturing the same.
제3도는 본 발명의 일실시예에 의한 트리플 베이스구조를 가지는 트랜지스터의 단면구조도로서, 이에 도시한 바와같이, P베이스가 제1베이스(1), 제2베이스(2) 및 제3베이스(3)의 3개의 영역으로 적층 형성되어 있고, 제3베이스(3)의 위에 n+ 에미터(4)가 형성되어 있다.FIG. 3 is a cross-sectional structure diagram of a transistor having a triple base structure according to an embodiment of the present invention. As shown in this figure, a P base includes a first base 1, a second base 2, and a third base 3; Is laminated | stacked and formed into three area | regions of (), and the n + emitter 4 is formed on the 3rd base 3.
도면에서 5는 n에피텍셜층, 6은 아이소레이션, 7은 P서브스트레이트, 8은 금속 접점, 9는 SiO2를 보인 것이다.5, n epitaxial layer, 6 isothermalization, 7 P substrate, 8 metal contact, and 9 SiO 2 .
상기 구조를 제조함에 있어서는 P서브스트레이트(7)위에 형성된 n 에피텍셜층(5)위에 제1베이스(1)를 보론 임플랜테이션(Boron implantation)시킨 후 드라이브 인(drive in: 2단 확산)시키고, 제2베이스(2)는 보론을 디포지트한후 드라이브 인하며 제3베이스(3)는 보론 임플렉테이션 시킨 후 드라이브 인시키어 베이스 접합깊이(XjB)가 5-7μm, 에피텍셜 두께(Tepi)가 19μm 이상의 영역에 존재하는 소자로 제조한다.In manufacturing the structure, the boron implantation of the first base 1 on the n epitaxial layer 5 formed on the P substrate 7 is carried out and drive-in (diffusion in two stages). The second base 2 is drive-in after depositing boron and the third base 3 is drive-in after boron implantation and the base junction depth (XjB) is 5-7 μm and the epitaxial thickness (Tepi) is It is manufactured with an element existing in an area of 19 μm or more.
그리고 접합의 깊이에 따른 농도구배를 제4도(a)(b)에 의하여 비교하여 보면 다음과 같다.And comparing the concentration gradient according to the depth of the junction 4 (a) (b) is as follows.
제4도(a)는 종래의 농도구배(a1)를 보이고, 제4도(b)는 개선된 본 발명의 농도구배(a2)를 보이고 있는바, x=Xj에서 기울기 a값을 비교하여 보면, a1a2로서 본 발명의 농도구배(a2)가 종래의 농도구배(a1)보다 훨씬 감소되고 따라서 파괴전압을 보다 더 높일 수 있음을 알 수 있다.Figure 4 (a) shows a conventional concentration gradient (a 1 ), Figure 4 (b) shows an improved concentration gradient (a 2 ) of the present invention, comparing the slope a value at x = Xj In conclusion, it can be seen that the concentration gradient a2 of the present invention as a1a2 is much reduced than the conventional concentration gradient a1, and thus the breakdown voltage can be further increased.
상기한 바와같은 본 발명은 고내압(high voltage) 바이폴라 트랜지스터의 전기적 특성중 파괴전압을 개선시키고 새로운 구조의 베이스 접합을 제작할 수 있으므로 베이스의 농도 콘트롤이 용이하고 다양한 종류의 소자를 만들 수 있다.As described above, the present invention can improve the breakdown voltage among the electrical characteristics of the high voltage bipolar transistor and fabricate a base junction of a new structure, thereby making it easy to control the concentration of the base and to make various kinds of devices.
즉 본 발명은 고내압용 새로운 소자를 제공할 수 있게 된다.That is, the present invention can provide a new device for high breakdown voltage.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890018568A KR0141962B1 (en) | 1989-12-14 | 1989-12-14 | Transistor having triple base structure and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890018568A KR0141962B1 (en) | 1989-12-14 | 1989-12-14 | Transistor having triple base structure and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
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KR910013476A KR910013476A (en) | 1991-08-08 |
KR0141962B1 true KR0141962B1 (en) | 1998-07-15 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019890018568A KR0141962B1 (en) | 1989-12-14 | 1989-12-14 | Transistor having triple base structure and manufacturing method thereof |
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KR (1) | KR0141962B1 (en) |
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1989
- 1989-12-14 KR KR1019890018568A patent/KR0141962B1/en not_active IP Right Cessation
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KR910013476A (en) | 1991-08-08 |
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