JPH02232929A - Semiconductor device with buried layer - Google Patents

Abstract

PURPOSE:To relieve the end part electric field concentration in a buried layer for augmenting the breakdown strength of the buried layer by a method wherein the impurity concentration in the end part regions of the buried layer is made lower than that in the central region of the same. CONSTITUTION:The title semiconductor device is provided with an n type buried layer 10 formed on a p type semiconductor substrate 1, isolation to p<+> type buried layers 3, n type epitaxial layers 4 deposited on the substrate 1 and p+ isolation layers 5 in contact with the buried layers 3 sectioning the said layers 4. The buried layer 10 immidiately below the sectioned regions is composed of a central region 12 and end part regions 14 overlapped with the central region 12 at the respective peripheral parts thereof and the central region 12 is to be an n<+> type region in high impurity concentration while the end part regions 14 are to be n<->type regions in lower impurity concentration than that of the central region 12. Through these procedures, the concentration work of electric line of force due to the curvature of the end part regions 14 can be cancelled or relieved.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device including a buried layer.

[Conventional technology]

Conventionally, a semiconductor device with a buried layer generally includes an n" type buried layer 2 with a high impurity concentration diffused on a p type semiconductor substrate 1 and an isolation up layer, as shown in FIG. It has a p+ type buried layer 3, an n type epitaxial layer 4 in a defined region grown on the substrate 1, and a p+ type isolation layer 5 in contact with the p+ type buried layer 3, and the n type epitaxial layer A predetermined high-voltage element is built into the semiconductor substrate 4.The significance of forming the n+ type buried layer 2 with a high impurity concentration is to reduce the parasitic pnp} transistor effect between the element and the p-type semiconductor substrate 1. It functions as an insulating capacitor, as a collector in the case of a vertical npn} transistor, and as a drain in the case of a vertical MOSFET, and reduces series resistance.

[Problem to be solved by the invention]

However, in terms of separating high voltage elements required for high voltage integrated circuit devices, the voltage resistance between the n-type epitaxial layer 4, the n+ type buried layer 2, and the p-type semiconductor substrate 1 is
The rate is determined by the curvature of the pn junction surface at the peripheral boundary of the n+ type buried layer 2, and for example, when the radius of curvature is about 9 μm, the breakdown voltage is 300 V as the limit.

FIG. 5 is a schematic diagram showing the state of charge distribution and expansion of the depletion layer of the conventional semiconductor device equipped with a buried layer. The broken line 1a in FIG. 5 is the edge of the depletion layer in the p-type substrate 1, and the broken line 2a is the n
The right side shows the depletion layer end in the 3-type buried layer 2. Since the n4-type buried layer 2 has a high impurity concentration, the expansion width of the depletion layer end 2a is narrow. Acceptor ions lb remain in the depletion layer of the p-type substrate 1 from which carriers have been swept out, and donor ions 2b remain in the depletion layer of the n+ type buried layer 2. The larger the curvature of the end region of the n+ type buried layer 2 (the smaller the radius of curvature), the more concentrated the electric lines of force D are compared to the central region, so the smaller the radius of curvature (the sharper it is), the lower the withstand voltage. do.

Of course, if the specific resistance of the p-type substrate 1 is increased, the withstand voltage will increase, but this requires the purity of the substrate, and 50 Ωcm is the limit at the mass production level. Furthermore, the higher the specific resistance, the greater the variation in resistance value, which is undesirable.

In addition, a method has been proposed in which the buried layer 2 is formed with a central region and an end region around it, and the curvature of the end region is made as small as possible to reduce electric field concentration at the end as much as possible. If the radius of curvature of the end region is increased, the thickness of the end region becomes excessively large compared to that of the central region, which poses problems such as obstacles to building elements into the defined region.

Therefore, an object of the present invention is to locally vary the impurity concentration of the buried layer without increasing the resistivity of the substrate or changing the geometry of the buried layer. It is an object of the present invention to provide a semiconductor device having a buried layer that alleviates electric field concentration and has a high breakdown voltage.

[Means to solve the problem]

In order to solve the above-mentioned problems, the measures taken by the present invention are such that the buried layer is composed of a central region and an end region in contact with the periphery thereof, and the impurity concentration of the end region is made higher than that of the central region. It is lowered.

[Effect]

According to this means, the depletion layer end in the buried layer does not expand with a uniform width from the junction surface, but the expansion width of the depletion layer end in the end region is larger than that in the central region. Although the curvature of the end region is large, the spread of the depletion layer in the end region is large and the ion density is low, so the concentration of electric lines of force in the end region is relaxed, and as a result, the breakdown voltage is lower than before. and become expensive.

〔Example〕

Next, embodiments of the present invention will be described based on the accompanying drawings.

FIG. 1 is a cross-sectional structural diagram showing an embodiment of a semiconductor device including a buried layer according to the present invention.

This semiconductor device with a buried layer includes an n-type buried layer 10 formed on a p-type semiconductor substrate l, an isolation-up p'' type buried layer 3, and further grown on a substrate 1. n
type epitaxial layer 4, and a p1 type isolation layer 5 which is in contact with the p+ type buried layer 3 and separates and defines the n type epitaxial layer 4.

The n-type buried layer 10 immediately below the defined region is composed of a central region 12 and an end region 14 that overlaps around the central region 12. The central region 12 is an n+ type region with high impurity concentration, and the end region 1
The impurity concentration of n 4 is lower than that of central region 12, and n
The surface concentration of the end region 14 in this embodiment is about l Almost equal.

FIG. 2 is a schematic diagram showing the charge distribution and the expansion state of the depletion layer in the above embodiment. A broken line 1a in FIG. 2 shows the end of the depletion layer in the p-type substrate 1, and a broken line 10a shows the end of the depletion layer in the n-type buried layer 10. The expanded width of the depletion layer end 10a in the central region 12 is narrower than that in the p-type substrate 1. This is because the impurity concentration in the central region 12 is high.

On the other hand, the expansion width of the depletion layer end 10a in the end region 14 is narrower than that in the central region 12. This is because the impurity concentration in the end regions 14 is lower than that in the central region 12. That is, the spread of the depletion layer within the end region 14 is larger than in the conventional case. Therefore, the density of acceptor ions 1b remaining in the depletion layer of p-type substrate 1 is the same as in the conventional case, but the density of donor ions lOb remaining in the depletion layer of end region 14 is smaller than in the conventional case. Although the curvature of the end region l4 is smaller than that of the flat part of the central region l2, and the lines of electric force D' tend to concentrate in the end region l4 due to the tip effect, the donor ions 10b
Since the density of D' is small, the number of lines of electric force D' in the end region 14 is small, and as a result, the concentration of lines of electric force D' is canceled out or relaxed. If the radius of curvature of the end region l4 is simply increased as in the past, the curvature of the end region 140 will become smaller, but it will not reach the curvature (infinity) of the flat part of the central region 12, and the lines of electric force will be concentrated. However, it is possible to simply reduce
Reducing the impurity concentration in the end region 14 can theoretically eliminate the concentration of electric lines of force.

Conventional. If the concentration of the buried layer is uniform and the radius of curvature of the end region is about 9 μm as in the example, the breakdown voltage of the end region will be reduced to 173 to 1/4 of that of the central region. The breakdown voltage of the end region l4 remained at about 172 that of the center region, and an improvement in the breakdown voltage of the end region 14 was confirmed. That is, end area 1
Lowering the impurity concentration of 4 has the same effect as increasing the radius of curvature of the end region 14 to infinity. In addition to the concentration control described above, if the radius of curvature of the end region 14 is increased, a further improvement in breakdown voltage can be achieved.

Next, the manufacturing method of the above embodiment will be explained with reference to FIG.

First, as shown in FIG. 3(a), a first resist mask 21 having an opening 21a in the center is formed on a p-type silicon substrate covered with an oxide film 20, and then a first arsenic film is formed. By implanting ions 22, arsenic atoms 23 are introduced directly below the opening. Next, as shown in FIG. 3 et al., after forming a second resist mask 24 having an end opening 24a at the center of the opening 21a of the resist mask 21, arsenic ions 25 are implanted to remove arsenic. Introduce atom 26. Next, as shown in FIG. 3(C), after forming a third resist mask 27 having an opening 27a over the region where the separation layer is to be formed, boron atoms 2 are implanted by implanting boron ions 2B.
Introducing 9. Next, as shown in FIG. 3, after annealing, an n-type epitaxial layer 4 is formed on the p-type substrate l by epitaxial growth. As a result, p-type substrate 1
At the center of the interface between the N-type epitaxial layer and the n-type epitaxial layer, there is a central region 12 which is a first arsenic-doped n+ buried layer, and an edge which is a second arsenic-doped n-buried layer that overlaps around this central region 12. The partial region 14 and the isolation region are doped with boron.
A + type buried layer 3 is formed. Next, as shown in FIG. 3(e), a p+ type isolation layer connected to the p+ buried layer 3 is formed by diffusion from the surface of the n type epitaxial layer 4.

In the above manufacturing process, the central region 12. Although the end region 14 and the p''-type buried layer 3 are annealed and diffused in the same process, each layer may be formed independently by performing the steps one after the other. In this case, the diffusion in the central region 12 is performed in the end Area 1
This is done prior to the diffusion in step 4. Note that antimony may be used instead of arsenic as an element with a low diffusion rate. Further, when the buried layer 10 is p-type, gallium having a low diffusion rate may be used.

〔Effect of the invention〕

As explained above, a semiconductor device with a buried layer according to the present invention has a buried layer composed of a central region and an end region that overlaps around the central region, and the impurity concentration of the end region is set to be lower than that of the central region. Since it is kept low compared to that, the following effects are achieved.

(2) Despite the concentration of electric lines of force due to the curvature of the end regions, the depletion layer charge density in the end regions is smaller than that in the central region, so the concentration of the lines of electric force can be canceled out or alleviated. Therefore, an improvement in breakdown voltage is achieved.

(2) Relaxing the curvature of the end region has the same or better effect, so there is no need to increase the thickness of the end region.

■Compared to controlling the specific resistance of the substrate, there is no variation and the yield is good.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional structural diagram showing an embodiment of a semiconductor device including a buried layer according to the present invention. FIG. 2 is a schematic diagram showing the charge distribution and the state of expansion of the depletion layer in the same example. FIGS. 3(a) to 3(e) are cross-sectional structural diagrams sequentially showing the manufacturing process of the same embodiment. FIG. 4 is a cross-sectional structural diagram showing an example of a conventional semiconductor device including a buried layer. FIG. 5 is a schematic diagram showing the charge distribution and the expansion state of the depletion layer in the conventional example. 1-p type semiconductor substrate, 3p+ type buried layer, 4n type epitaxial layer, 5. p+ type isolation layer, 10-
n-type buried layer, 12n+ type central region, 14- n-type end region, la, 10a depletion layer edge, 1b acetate ion, 10b donor ion, D' Fig. P Fig./A-P1 Fig.

Claims (1)

[Claims] 1) A first conductivity type semiconductor substrate and a second semiconductor substrate grown on it.
In a semiconductor device including a buried layer of a second conductivity type embedded in an interface with a conductivity type layer, the buried layer is composed of a central region and an end region overlapping around the central region, and A semiconductor device comprising a buried layer characterized in that the impurity concentration is lower than that in the central region.