JPS63245957A - Lateral pnp transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve a transition frequency of a transistor by forming a low concentration P-type diffused layer on a collector region and an N-type diffused layer on an emitter region, and the approaching collector and emitter diffused layers to each other by means of thermal diffusion. CONSTITUTION:A low concentration acceptor impurity is ion implanted in the degree of substantially eliminating the conductor of an N-type conductivity layer of an epitaxial layer 3 through the opening 7 of an insulating film 5 to become an emitter region. Then, doner impurity is ion implanted through an opening 8 to form an emitter region. Thereafter, diffused layers 10, 11 of collector and emitter regions are approached to each other to be formed by a heat treatment. Thus, an oblique base is formed on a base region directed from the emitter side to the collector side. Then, other base region is depleted or formed in a P-type, carrier base running time is shortened to enhance its transition frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field of the Invention] The present invention provides a lateral P with a high transition frequency f.
The present invention relates to an NP l-transistor, and more particularly to a method for manufacturing a lateral type PNP transistor.

[Problem that the invention seeks to solve]

FIG. 7 is a cross-sectional view of a semiconductor device showing a conventional lateral PNP transistor, in which 1 is a semiconductor substrate, 2 is a buried layer, 3 is an epitaxial growth layer, 4 is a separation layer, and 2
0.21.22 are the collector, emitter, and base diffusion regions, respectively. The base portion of a conventional lateral PNP transistor is an epitaxial growth layer 3 of N conductivity type formed by epitaxial growth. Therefore, the concentration distribution of the donor element is uniform from the emitter to the collector, and the base width cannot be made too narrow in order to ensure collector-emitter breakdown voltage and stability of the current amplification factor. Therefore, since the base width is thick, there is a drawback that the base traveling time of the carrier is long. That is, as shown in FIG. 8 (b), the transition frequency f□ of the conventional lateral PNP transistor is about 5M1lz, so it is easy to use in semiconductor integrated circuits and can be formed simultaneously with NPN transistors. Although it has various advantages such as low manufacturing man-hours, it has the disadvantage that it cannot be used in high-frequency circuits.

Lateral PNP transistors with a high transition frequency f, which are applied to high-frequency circuits, usually use a complicated manufacturing process, so there is room for improvement when forming them in the same manufacturing process as other elements such as NPN transistors. . Furthermore, there is a drawback that the manufacturing cost is high, and it is difficult to achieve a semiconductor device with an improved transition frequency f1 without significantly increasing the number of manufacturing steps.

[Purpose of the invention]

The present invention has been made to eliminate the above-mentioned drawbacks, and its main purpose is to provide a lateral PNP transistor suitable for high frequency use with a high transition frequency f7.

Another object of the present invention is to provide a method for manufacturing a lateral PNP transistor that can improve the transition frequency f7 using a simple manufacturing method and can simultaneously form other semiconductor devices.

[Summary of the invention]

In the lateral PNP transistor of the present invention, a low concentration P type diffusion layer is formed to cancel the conductivity type of the epitaxial layer before forming the collector region diffusion layer, and the emitter region is formed after forming the N type diffusion layer in the emitter region. Form a diffusion layer. This forms a drift base (slanted base) in the base region and increases the transition frequency f.

[Embodiments of the invention]

A lateral PNP transistor and a method for manufacturing the same according to the present invention will be explained based on FIGS. 1 to 6.

First, FIG. 1 is a sectional view of a completed semiconductor device showing an embodiment of a lateral PNP transistor according to the present invention. The lateral PNP transistor of the present invention has a negative concentration gradient in the base region from the emitter side to the collector side. Then, by implanting acceptor impurities into the base region other than the base region having this gradient and depleting it or making it P conductivity type, the base transit time of carriers is shortened and the transition frequency f is increased. It is meant to make it bigger.

Hereinafter, the lateral P of the present invention will be explained based on FIGS. 2 to 6.
An example of a method for manufacturing an NP transistor will be described.

In the process shown in FIG. 2, a buried layer 2 of N conductivity type is formed in a semiconductor substrate 1 of P conductivity type, and an epitaxial growth layer 3 of Ni conductivity type is formed. A separation layer 4 is formed by a P conductivity type diffusion layer that reaches the semiconductor substrate 1 from its main surface, and an N conductivity type island region is formed in the epitaxial growth layer 3.

Further, an insulation N5 made of a thermal oxide film or the like is formed on the main surface of the semiconductor substrate.

The process shown in FIG. 3 was applied to the main surface of the island region formed in FIG. 2! ! Openings 7.8 for forming an emitter region and a collector region in the S edge film 5 are formed by etching. Thereafter, after the entire surface is covered with the resist film 6, the portion of the resist film 6 where the collector region will be formed is removed. Note that the resist film 6 is left on the outer periphery of the opening 7 to suppress the collector region from expanding in the lateral direction and to reduce the device area. Next, using the resist film 6 and the insulating film 5 as masks, an impurity element that is to be of P conductivity type is ion-implanted into the main surface of the semiconductor substrate as shown by arrow A to dope the main surface of the semiconductor substrate with an impurity element. do.

In the process shown in FIG. 4, a resist film 9 is deposited on the opening 7 to form a mask, and a donor impurity element forming an N conductivity type is ion-implanted through the opening 8 as shown by arrow B. This is a step of doping the epitaxial growth layer 3.

The step shown in FIG. 5 is an annealing step in which acceptor and donor impurity elements doped into the semiconductor substrate by ion implantation in the steps shown in FIGS. 3 and 4 are simultaneously diffused in a heat treatment step. Diffusion layers 10.11 in the collector region and emitter region formed by this annealing step are diffusion regions in which the diffusion layer 10 is depleted or the epitaxially grown layer 3 is made into a P conductivity type with a low concentration. Reference numeral 11 denotes a diffusion region in which N-conductivity type impurities are diffused to a higher concentration than the N-conductivity type impurity concentration of the epitaxial growth layer 3 . This manufacturing process forms a sloped base.

In the step shown in FIG. 6, the impurity element of the P conductivity type is diffused by thermal diffusion from the openings 7 and 8 in which the collector and emitter regions are to be formed, using the insulating film 5 formed in the previous step as a mask to form the collector and emitter regions. Form a diffusion layer. At the same time as this diffusion step, an insulating film 12 such as a thermal oxide film is deposited on the insulating film 5. Thereafter, an opening is formed in the insulating film 12 that will form the base contact part, and the diffusion layer 15 of the base electrode part is formed. After the collector, base, and emitter regions have been diffused, the thermal oxide film 12 formed at the contact portion is removed to form wiring conductors 16, 17, and 18, thereby forming a lateral PNP transistor.

Note that the collector diffusion region 13 when viewed from the surface of the semiconductor device is arranged in a circular shape around the outer periphery of the emitter diffusion region.

It is clear that the ion implantation process shown in FIGS. 3 and 4 is not necessarily limited to this manufacturing method, and the diffusion layer may be formed by a deposit drive-in process.

As mentioned above, the lateral PNP transistor of the present invention is manufactured by the manufacturing process shown in FIGS. , the concentration of the acceptor is set to a concentration that substantially cancels out the conductor of the N conductive layer of the epitaxial N3. In addition, the donor impurity element ion-implanted prior to the emitter region is a diffusion layer for forming an inclined base in the base region, and the diffusion layer 1
0.11 are formed close to each other. Also, diffusion 1? !
10.11, it is desirable to avoid contact in order to form a good sloped base. This manufacturing process allows the sloped base of the base region to be formed more effectively, and is effective in shortening the base traveling time of the carrier.

Furthermore, since the collector and emitter regions are diffused using the insulating film 5 as a mask, the openings 7 and 8 are formed in the photochemical process.
The variation in door opening is reduced.

Even if sheet metal variations occur, the base concentration is controlled and variations in electrical characteristics are suppressed. Therefore, the base transit time of the carrier is reduced, and the transition frequency fT can be reduced.

The lateral PNP transistor of the present invention differs from the conventional lateral PNP l-transistor shown in FIG.
A sloped base is formed in the base region between the collector region 13 and the emitter region 14. As a result, as shown in FIG. 8, the transition frequency r can be improved to about 100 MHz, as shown in FIG.

Incidentally, FIG. 8 is a diagram showing the relationship between the transition frequency fT and the collector current 1c (ft Ic), and the vertical axis of FIG. 8 is the transition frequency fT.
The horizontal axis is the collector current IC. Furthermore, the collector current! .

falls around 1100II, but the collector current I
, is reduced by limiting , and collector current , can be increased by increasing the number of elements.

Furthermore, the acceptor concentration of the diffusion layer 10, the donor concentration of the diffusion layer 11, and the amount of lateral spread of the diffusion layer 10 and the diffusion layer 11 are determined depending on the characteristics required for the device, such as the transition frequency fT, breakdown voltage, and collector concentration. Characteristics such as resistance and base resistance may be controlled and set to optimal values.

Further, by diffusing the diffusion layer 15 in the base contact portion at the same time as the N5 type diffusion layer in the emitter region, the base resistance can be lowered and the characteristics can be improved.

〔Effect of the invention〕

The lateral PNP transistor of the present invention can improve the transition frequency f to 80M1lz or more, so it is extremely effective as a lateral PNP transistor for high frequencies, and has the advantage that it can be formed through an extremely simple manufacturing process. be.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of a lateral type PNP transistor according to the present invention, and FIGS. 7 is a sectional view showing an example of a conventional lateral type PNP transistor, and FIG. 8 is a sectional view showing the transition frequency and collector current (ft-1
FIG. 3 is an explanatory diagram for explaining the relationship c). 1: Semiconductor substrate, 2: Buried layer, 3: Epitaxial growth layer, 4: Separation layer, 5: Insulating film, 6,9 resist film, 7
．． 8: opening, IO: diffusion layer doped with an impurity element of P conductivity type, 11: diffusion layer of N conductivity type, 12: insulating film,
13: Correct diffusion region, 14: Emitter diffusion region, 1
5: Diffusion layer of base contact portion, 16: Wiring conductor of collector electrode, 17: Wiring conductor of emitter electrode, 18
: Electrode wiring conductor

Claims (2)

[Claims] (1) In a lateral PNP transistor, a collector diffusion layer consisting of an island region separated from other epitaxial growth layers and first and second diffusion layers of the same conductivity type formed in the island region; and a second conductivity type diffusion layer formed in the second conductivity type epitaxial growth layer surrounded by the collector diffusion layer, and a first conductivity type emitter diffusion layer formed in the second conductivity type diffusion layer. A lateral PNP transistor, wherein the second conductivity type diffusion layer at the periphery of the emitter diffusion layer is disposed close to the first diffusion layer of the collector diffusion layer. (2) a step in which a buried layer of a second conductivity type is formed in a semiconductor substrate of a first conductivity type, and an epitaxial growth layer of a second conductivity type is formed to obtain a semiconductor substrate; forming an insulating film on the main surface of the semiconductor substrate and providing an opening in a portion where a collector region is to be formed to form a first island-like region of a first conductivity type; doping with an impurity element, doping a second impurity element of a second conductivity type into a portion surrounded by the collector region, and then simultaneously diffusing the first and second impurity elements; A lateral PNP transistor comprising the step of forming a first conductivity type diffusion layer in each of the regions in which the first and second impurity elements are diffused to form an emitter diffusion layer and a collector diffusion layer. manufacturing method.