JPWO2023170782A1 - - Google Patents

Info

Publication number
JPWO2023170782A1
JPWO2023170782A1 JP2024505697A JP2024505697A JPWO2023170782A1 JP WO2023170782 A1 JPWO2023170782 A1 JP WO2023170782A1 JP 2024505697 A JP2024505697 A JP 2024505697A JP 2024505697 A JP2024505697 A JP 2024505697A JP WO2023170782 A1 JPWO2023170782 A1 JP WO2023170782A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024505697A
Other languages
Japanese (ja)
Other versions
JPWO2023170782A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2023170782A1 publication Critical patent/JPWO2023170782A1/ja
Publication of JPWO2023170782A5 publication Critical patent/JPWO2023170782A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/488—Word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/711—Insulated-gate field-effect transistors [IGFET] having floating bodies

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
JP2024505697A 2022-03-08 2022-03-08 Pending JPWO2023170782A1 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/009984 WO2023170782A1 (ja) 2022-03-08 2022-03-08 半導体メモリ装置

Publications (2)

Publication Number Publication Date
JPWO2023170782A1 true JPWO2023170782A1 (https=) 2023-09-14
JPWO2023170782A5 JPWO2023170782A5 (https=) 2024-11-11

Family

ID=87932185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024505697A Pending JPWO2023170782A1 (https=) 2022-03-08 2022-03-08

Country Status (3)

Country Link
US (1) US12283310B2 (https=)
JP (1) JPWO2023170782A1 (https=)
WO (1) WO2023170782A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023170782A1 (ja) * 2022-03-08 2023-09-14 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体メモリ装置
WO2025074607A1 (ja) * 2023-10-06 2025-04-10 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
JP7754535B1 (ja) 2024-05-30 2025-10-15 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置と、その製造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003188279A (ja) * 2001-12-14 2003-07-04 Toshiba Corp 半導体メモリ装置およびその製造方法
JP2008147514A (ja) * 2006-12-12 2008-06-26 Renesas Technology Corp 半導体記憶装置
JP2011066151A (ja) * 2009-09-16 2011-03-31 Toshiba Corp 半導体装置およびその製造方法
JP2011527515A (ja) * 2008-07-10 2011-10-27 コミッサリア ア レネルジー アトミーク エ オ ゼネルジ ザルタナテイヴ マイクロ電子３ｄｎａｎｄフラッシュメモリデバイスの構造および製造プロセス
US20200135863A1 (en) * 2015-04-29 2020-04-30 Zeno Semiconductor, Inc. MOSFET and Memory Cell Having Improved Drain Current Through Back Bias Application
JP2021508414A (ja) * 2017-12-04 2021-03-04 東京エレクトロン株式会社 積層ゲートを有する半導体装置及びその製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7391640B2 (en) * 2004-12-10 2008-06-24 Intel Corporation 2-transistor floating-body dram
US7919800B2 (en) 2007-02-26 2011-04-05 Micron Technology, Inc. Capacitor-less memory cells and cell arrays
US8441053B2 (en) * 2010-10-15 2013-05-14 Powerchip Technology Corporation Vertical capacitor-less DRAM cell, DRAM array and operation of the same
JP5789733B1 (ja) * 2014-10-07 2015-10-07 ユニサンティス エレクトロニクス シンガポール プライベート リミテッドＵｎｉｓａｎｔｉｓ Ｅｌｅｃｔｒｏｎｉｃｓ Ｓｉｎｇａｐｏｒｅ Ｐｔｅ Ｌｔｄ． 柱状半導体メモリ装置及びその製造方法
US10468414B2 (en) * 2017-12-28 2019-11-05 Samsung Electronics Co., Ltd. Semiconductor memory devices
WO2019168752A1 (en) * 2018-02-27 2019-09-06 Micron Technology, Inc Three dimensional memory devices
KR102634622B1 (ko) * 2019-02-28 2024-02-08 에스케이하이닉스 주식회사 수직형 메모리 장치
KR102226206B1 (ko) * 2020-02-06 2021-03-11 포항공과대학교 산학협력단 이중 pn 접합을 포함하는 메모리 소자 및 그 구동방법
US11495283B2 (en) * 2021-01-11 2022-11-08 Micron Technology, Inc. Integrated assembly with memory array over base, sense amplifiers in base, and vertically-extending digit lines associated with the memory array
US20220335982A1 (en) * 2021-04-19 2022-10-20 Micron Technology, Inc. Shared vertical digit line for semiconductor devices
WO2023170782A1 (ja) * 2022-03-08 2023-09-14 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体メモリ装置
WO2023188006A1 (ja) * 2022-03-29 2023-10-05 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体メモリ装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003188279A (ja) * 2001-12-14 2003-07-04 Toshiba Corp 半導体メモリ装置およびその製造方法
JP2008147514A (ja) * 2006-12-12 2008-06-26 Renesas Technology Corp 半導体記憶装置
JP2011527515A (ja) * 2008-07-10 2011-10-27 コミッサリア ア レネルジー アトミーク エ オ ゼネルジ ザルタナテイヴ マイクロ電子３ｄｎａｎｄフラッシュメモリデバイスの構造および製造プロセス
JP2011066151A (ja) * 2009-09-16 2011-03-31 Toshiba Corp 半導体装置およびその製造方法
US20200135863A1 (en) * 2015-04-29 2020-04-30 Zeno Semiconductor, Inc. MOSFET and Memory Cell Having Improved Drain Current Through Back Bias Application
JP2021508414A (ja) * 2017-12-04 2021-03-04 東京エレクトロン株式会社 積層ゲートを有する半導体装置及びその製造方法

Also Published As

Publication number Publication date
WO2023170782A1 (ja) 2023-09-14
US20230290404A1 (en) 2023-09-14
US12283310B2 (en) 2025-04-22

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