JPWO2022029532A1 - - Google Patents

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Publication number
JPWO2022029532A1
JPWO2022029532A1 JP2022541318A JP2022541318A JPWO2022029532A1 JP WO2022029532 A1 JPWO2022029532 A1 JP WO2022029532A1 JP 2022541318 A JP2022541318 A JP 2022541318A JP 2022541318 A JP2022541318 A JP 2022541318A JP WO2022029532 A1 JPWO2022029532 A1 JP WO2022029532A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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JP2022541318A
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Japanese (ja)
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JP7596386B2 (ja
JPWO2022029532A5 (https=
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Publication of JPWO2022029532A1 publication Critical patent/JPWO2022029532A1/ja
Publication of JPWO2022029532A5 publication Critical patent/JPWO2022029532A5/ja
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Publication of JP7596386B2 publication Critical patent/JP7596386B2/ja
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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443Sum of products
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065Analogue means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
    • G06G7/14Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for addition or subtraction 
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
    • G06G7/16Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for multiplication or division
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/48Analogue computers for specific processes, systems or devices, e.g. simulators
    • G06G7/60Analogue computers for specific processes, systems or devices, e.g. simulators for living beings, e.g. their nervous systems ; for problems in the medical field
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/08Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802Special implementations
    • G06F2207/4818Threshold devices
    • G06F2207/4824Neural networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Biomedical Technology (AREA)
  • Health & Medical Sciences (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biophysics (AREA)
  • Neurology (AREA)
  • General Health & Medical Sciences (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Power Engineering (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Molecular Biology (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Neurosurgery (AREA)
  • Physiology (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2022541318A 2020-08-03 2021-07-19 半導体装置、及び電子機器 Active JP7596386B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020131616 2020-08-03
JP2020131616 2020-08-03
PCT/IB2021/056484 WO2022029532A1 (ja) 2020-08-03 2021-07-19 半導体装置、及び電子機器

Publications (3)

Publication Number Publication Date
JPWO2022029532A1 true JPWO2022029532A1 (https=) 2022-02-10
JPWO2022029532A5 JPWO2022029532A5 (https=) 2024-08-20
JP7596386B2 JP7596386B2 (ja) 2024-12-09

Family

ID=80117202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022541318A Active JP7596386B2 (ja) 2020-08-03 2021-07-19 半導体装置、及び電子機器

Country Status (5)

Country Link
US (1) US12149237B2 (https=)
JP (1) JP7596386B2 (https=)
KR (1) KR20230047392A (https=)
CN (1) CN116134442A (https=)
WO (1) WO2022029532A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7717080B2 (ja) * 2020-09-18 2025-08-01 株式会社半導体エネルギー研究所 半導体装置、および電子機器
US12481867B2 (en) * 2021-04-28 2025-11-25 Arm Limited Memory for artificial neural network accelerator
TWI792958B (zh) * 2022-03-24 2023-02-11 瑞昱半導體股份有限公司 源極隨耦電路

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06131482A (ja) * 1992-10-14 1994-05-13 Nippon Telegr & Teleph Corp <Ntt> アナログニューラルネットワーク回路
JP2018025759A (ja) * 2016-06-29 2018-02-15 株式会社半導体エネルギー研究所 電子機器、該電子機器の動作方法、移動体
WO2018234919A1 (ja) * 2017-06-21 2018-12-27 株式会社半導体エネルギー研究所 ニューラルネットワークを有する半導体装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5847472B2 (ja) * 2011-07-20 2016-01-20 キヤノン株式会社 検出装置及び検出システム
US10483293B2 (en) * 2014-02-27 2019-11-19 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device, and module and electronic appliance including the same
US9584707B2 (en) * 2014-11-10 2017-02-28 Semiconductor Energy Laboratory Co., Ltd. Imaging device and electronic device
US10163948B2 (en) * 2015-07-23 2018-12-25 Semiconductor Energy Laboratory Co., Ltd. Imaging device and electronic device
US10083991B2 (en) * 2015-12-28 2018-09-25 Semiconductor Energy Laboratory Co., Ltd. Display device, display module, and electronic device
WO2019111137A1 (ja) * 2017-12-06 2019-06-13 株式会社半導体エネルギー研究所 半導体装置、表示装置、電子機器、及び動作方法
KR102823435B1 (ko) * 2018-10-11 2025-06-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 촬상 장치 및 전자 기기
US11888446B2 (en) 2019-05-08 2024-01-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
WO2020254909A1 (ja) 2019-06-21 2020-12-24 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
US12120443B2 (en) 2020-01-21 2024-10-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
WO2021209855A1 (ja) 2020-04-17 2021-10-21 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
CN115428167A (zh) 2020-04-23 2022-12-02 株式会社半导体能源研究所 半导体装置
TWI865775B (zh) 2020-05-15 2024-12-11 日商半導體能源研究所股份有限公司 半導體裝置及電子裝置
WO2021229385A1 (ja) 2020-05-15 2021-11-18 株式会社半導体エネルギー研究所 半導体装置
KR20230039668A (ko) 2020-07-17 2023-03-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 전자 기기
US20230284429A1 (en) 2020-07-31 2023-09-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US20230352477A1 (en) 2020-08-03 2023-11-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06131482A (ja) * 1992-10-14 1994-05-13 Nippon Telegr & Teleph Corp <Ntt> アナログニューラルネットワーク回路
JP2018025759A (ja) * 2016-06-29 2018-02-15 株式会社半導体エネルギー研究所 電子機器、該電子機器の動作方法、移動体
WO2018234919A1 (ja) * 2017-06-21 2018-12-27 株式会社半導体エネルギー研究所 ニューラルネットワークを有する半導体装置

Also Published As

Publication number Publication date
WO2022029532A1 (ja) 2022-02-10
US12149237B2 (en) 2024-11-19
CN116134442A (zh) 2023-05-16
JP7596386B2 (ja) 2024-12-09
KR20230047392A (ko) 2023-04-07
US20230283276A1 (en) 2023-09-07

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