JPWO2019186339A1 - 表示装置 - Google Patents
表示装置 Download PDFInfo
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- JPWO2019186339A1 JPWO2019186339A1 JP2020510166A JP2020510166A JPWO2019186339A1 JP WO2019186339 A1 JPWO2019186339 A1 JP WO2019186339A1 JP 2020510166 A JP2020510166 A JP 2020510166A JP 2020510166 A JP2020510166 A JP 2020510166A JP WO2019186339 A1 JPWO2019186339 A1 JP WO2019186339A1
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/1362—Active matrix addressed cells
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- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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Abstract
Description
本実施の形態では、本発明の一態様の表示装置について図1乃至図7を用いて説明する。
図1に、表示モジュールの上面図を示す。
画素11aが有するトランジスタ102および容量素子105の一例について、図2(B)および図3を用いて説明する。
図5(A)、(B)、(C)、図6および図7(A)、(B)を用いて、画素に、2つのトランジスタと、2つの容量素子と、を有する表示装置の構成例について説明する。
図5(A)に、画素11bの回路図を示す。
図5(B)に示すタイミングチャートを用いて、画素11bにおける補正信号(Vp)をノードNAに書き込む動作を説明する。画像信号(Vs)の補正を目的とする場合、補正信号Vpの書き込みは、フレーム期間毎に行うことが好ましい。なお、配線124に供給される補正信号(Vp)には正または負の任意の信号を用いることができるが、ここでは正の信号が供給される場合を説明する。また、以下の説明においては、高電位を“H”、低電位を“L”で表す。
次に、本実施の形態の表示装置及び表示モジュールの各構成要素に用いることができる材料等の詳細について、説明を行う。
本実施の形態は、本発明の一態様に用いることができるトランジスタの一例を説明する。
図8(A)は、トランジスタ200の上面図であり、図8(B)は、図8(A)に示す一点鎖線A1−A2における切断面の断面図に相当し、図8(C)は、図8(A)に示す一点鎖線B1−B2における切断面の断面図に相当する。なお、図8(A)において、トランジスタ200の構成要素の一部(ゲート絶縁層等)を省略して図示している。また、一点鎖線A1−A2方向はチャネル長方向、一点鎖線B1−B2方向はチャネル幅方向に相当する。また、トランジスタの上面図については、以降の図面においても図8(A)と同様に、構成要素の一部を省略して図示するものとする。
以下では、上記構成例1と一部の構成が異なるトランジスタの構成例について説明する。なお、以下では、上記構成例1と重複する部分は説明を省略する場合がある。また、以下で示す図面において、上記構成例と同様の機能を有する部分についてはハッチングパターンを同じくし、符号を付さない場合もある。
本実施の形態では、本発明の一態様の電子機器について、図11(A)、(B)、(C)および図12(A)、(B)、(C)、(D)、(E)を用いて説明する。
Claims (5)
- トランジスタと、第1の導電層と、第2の導電層と、第3の導電層と、を有し、
前記トランジスタのチャネル幅は、30μm以上1000μm以下であり、
前記トランジスタは、複数の半導体層を有し、
前記複数の半導体層の個数は2より大きく50以下であり、
前記複数の半導体層のそれぞれは、チャネル形成領域、第1の領域および第2の領域を有し、
前記複数の半導体層のそれぞれにおいて、前記チャネル形成領域は、上面からみて、前記第1の領域と前記第2の領域に挟まれて配置され、
前記複数の半導体層のそれぞれが有する前記チャネル形成領域は、金属酸化物を有し、
前記金属酸化物は、少なくともインジウムまたは亜鉛を有し、
前記複数の半導体層のそれぞれが有する前記チャネル形成領域は、前記第1の導電層と重なる領域を有し、
前記第1の領域は、前記第2の導電層と重なり、かつ、前記第1の導電層と重ならず、
前記第2の領域は、前記第3の導電層と重なり、かつ、前記第1の導電層と重ならず、
前記第3の導電層は、可視光を透過する機能を有し、
積層された状態の前記第2の領域と前記第3の導電層は可視光を透過する機能を有する表示装置。 - 請求項1において、
前記複数の半導体層のそれぞれが有する前記チャネル形成領域の幅は、2μm以上300μm以下である表示装置。 - 請求項1または請求項2において、
前記第1の領域は前記トランジスタのソース領域およびドレイン領域の一方として機能し、
前記第2の領域は前記トランジスタのソース領域およびドレイン領域の他方として機能し、
前記第1の領域および前記第2の領域は、前記チャネル形成領域よりも電気抵抗が低く、
前記第1の領域および前記第2の領域は、ホウ素またはリンを有する表示装置。 - 請求項1乃至請求項3のいずれか一において、
フィールドシーケンシャル駆動方式により表示する機能を有する表示装置。 - 請求項1乃至請求項4のいずれか一において、
液晶素子を有し、
前記液晶素子は、光散乱型液晶素子であり、
前記液晶素子は、オン状態のときに光を散乱させ、オフ状態のときに光を透過させる表示装置。
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JP2023058494A (ja) | 2023-04-25 |
CN111902856A (zh) | 2020-11-06 |
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US20230088632A1 (en) | 2023-03-23 |
KR20200139701A (ko) | 2020-12-14 |
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US20210026176A1 (en) | 2021-01-28 |
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