JPS648952B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a field identification device for identifying odd and even fields of interlaced scanning lines from a video signal, and is applicable to applications where it is necessary to correctly identify odd and even fields of a video signal. For example, multiplexing and demodulation in a stereoscopic television system where left and right video signals are multiplexed in field sequential order, a PCM recorder that records a pulse code modulated (PCM) audio signal as a video signal, and a waveform monitor.
This can be used for observing VIT signals, etc.

Conventionally, there has been a device for this purpose, for example, as shown in FIG. The operation of this device will be explained with reference to the signal waveform diagram in FIG. Note that the signals a to f in FIG. 1 correspond to the signal waveforms a to f in FIG. 2.

The input video signal is sent to the synchronization signal separation circuit 1
(see a in Figure 2), H/2<T
The equivalent pulse is removed by a stable constant multivibrator 2 having a period T of <H (where H is the horizontal period), resulting in a continuous horizontal pulse b. The composite synchronizing signal a read by the D flip-flop circuit 3 at the rising edge of the horizontal pulse b becomes the vertical synchronizing signal c delayed by about 3/4H. On the other hand, the integrated composite synchronization signal d is read by the D flip-flop circuit 4 as a clock pulse, and becomes a vertical synchronization signal e delayed by 1/2H. By comparing the phases of the signals c and e with the D flip-flop circuit 5, pulse signals having different levels depending on the field, such as f, are obtained. In addition, the second
The figure shows the case of an odd field, but in the case of an even field, the vertical synchronizing signal advances by 1/2H compared to FIG. 2, so the waveform c advances by 1H. However, since the waveform of e advances by only 1/2H, c advances before e, and the waveform of f reverses from "1" to "0".

The operation of the conventional field identification device shown in FIG. 1 is as described above, and if it is a regular video signal, it will normally identify odd and even fields. However, there was a problem in that it did not work properly in the case of a video signal that did not contain equivalent pulses, such as computer image output, and was prone to malfunction in the case of a noisy video signal. . For example, in FIG. 2, if there is no equivalent pulse notch in the vertical synchronization portion of the composite synchronization signal a, a horizontal pulse in the vertical synchronization portion cannot be obtained, and a waveform such as c cannot be obtained. Also, waveform e cannot be obtained.

This problem also exists in other odd/even field discrimination devices that count the number of equivalent pulses.

In view of the above problems, the present invention can stably distinguish between odd and even fields even if the video signal has an irregular synchronization signal as long as it is interlaced, and also operates stably against noise. The present invention aims to provide a field identification device.

The basic idea of the present invention is to generate continuous horizontal pulses using a monostable multivibrator using a horizontal AFC circuit. This makes it more resistant to noise and allows normal identification of odd and even fields even in non-standard video signals that do not have equivalent pulses. Furthermore, by doubling the oscillation frequency of the horizontal AFC circuit, the timing required for reading the vertical synchronization signal can be accurately obtained, and the circuit can be configured digitally without an unstable time constant circuit.

Next, the present invention will be explained in detail according to illustrated embodiments.

FIG. 3 is a block diagram of an embodiment of the present invention, and FIG.
The figure shows the signal waveforms of each part, H, H', I, J,
K, L, M, M', N, N' are signals H to N in Figure 3.
It corresponds to In those figures, an input video signal is converted into a composite synchronization signal H by a synchronization signal separation circuit 11. 12 is a horizontal AFC circuit and a delay circuit, which outputs a horizontal pulse K delayed by 90 degrees from the horizontal synchronizing signal. The horizontal AFC circuit consists of a phase detection circuit 16 and a voltage controlled oscillator circuit (VCO).
It is composed of a 17 and 1/2 frequency dividing circuit 18, and outputs a pulse I and a horizontal pulse J of twice the horizontal frequency (2f _H ) in synchronization with a horizontal synchronizing signal. Since this circuit is a phase-locked loop (PLL), it is stable against noise and continues to output pulses even if the input pulse is interrupted slightly. The delay circuit 19 is a D flip-flop circuit, which reads the horizontal pulse I with a clock pulse inverted by an inverter 20 from a horizontal pulse (2f _H pulse) having twice the frequency to obtain a horizontal pulse K delayed by 90 degrees. This horizontal pulse K is obtained. The rising edge of this horizontal pulse K is at 1/4H of the horizontal period H, and the falling edge is at 3/4H. If the oscillation frequency of the horizontal AFC circuit is 2f _H or higher, this timing can be obtained accurately. If this pulse is used as a clock pulse and the composite synchronizing signal H is read by a D flip-flop circuit, vertical synchronizing signals L and M shifted by 1/2H are obtained. If these two pulses are compared in phase by the D flip-flop circuit 15, L is better than M.
Since it is further advanced, the output N will be at a low level.

The above is for odd fields, but for even fields, the composite synchronization signal is as shown in Figure 4.
H', and the vertical synchronizing signal M becomes M',
This time, since M′ is ahead of L, the output
N' changes to a high level.

As is clear from the above examples, horizontal AFC
The circuit is phase-synchronized with the input video signal, so it is stable against noise, and it outputs horizontal pulses continuously even in the absence of equivalent pulses, providing accurate reading timing, resulting in stable operation. . Further, in order to further improve the stability against noise, the D flip-flop circuits 13 and 14
High frequency noise can be attenuated by inserting a filter with a time constant of 1/4H or less in front of the input terminal. Furthermore, if a level of 2f _H or higher synchronized with the input video signal can be obtained from video equipment, etc., that pulse can be used instead of the horizontal AFC circuit.

In addition, the method for extracting horizontal pulses delayed by 90 degrees from the horizontal AFC circuit and the delay circuit includes a method similar to the embodiment shown in FIG. 3 as shown in FIG.
There is a method of feeding back to the phase comparator after the delay circuit, as shown in the figure, but either method can be used. In addition, in FIG. 5, 21 is a synchronization signal separation circuit;
22 is a phase comparator, 23 is a low-pass filter, 2
4 is a voltage controlled oscillator (VCO), and 25 is a delay circuit.

Furthermore, since the circuit configuration of the delay circuit 25 in FIG. 5 does not use a D flip-flop circuit as in this embodiment, the delay time will be inaccurate;
It is also possible to create a 90 degree delay circuit by converting it into a triangular wave using an RC integration circuit and slicing it at the AC zero level using a capacitor-coupled comparator. horizontal
The above delay circuit is effective when the horizontal frequency is used as it is as the oscillation frequency of the AFC circuit.

As described above, according to the present invention, not only regular video signals but also non-regular video signals without equivalent pulses such as computer image output can be adjusted from the interlaced state of the vertical synchronization signal to odd and even fields. It is possible to correctly identify and operate stably even in the face of noise. In addition, since the oscillation frequency of the horizontal AFC is 2f _H or more, the frequency is divided to 2f _H , which is similar to the embodiment, and in addition to using a D flip-flop circuit as the delay circuit, 1/4H,
Accurate reading timing of 3/4H can be obtained, and stable operation is possible without adjustment.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the conventional example, Fig. 2 is a signal waveform diagram of each part in Fig. 1, Fig. 3 is a block diagram of an embodiment of the present invention, and Fig. 4 is a signal waveform of each part in Fig. 3. 5a and 5b are block diagrams showing another example of the configuration of the horizontal AFC circuit and delay circuit that can be used in the present invention. 11...Synchronization signal separation circuit, 12...Horizontal
AFC circuit and delay circuit, 13, 14, 15...
...D flip-flop circuit.

Claims (1)

[Scope of Claims] 1. A synchronization separation circuit that separates a composite synchronization signal from an input video signal, a horizontal phase synchronization circuit that generates a horizontal pulse synchronized with a horizontal synchronization signal of the composite synchronization signal, and a horizontal phase synchronization circuit that generates a horizontal pulse synchronized with the horizontal synchronization signal of the composite synchronization signal. a delay circuit that outputs a delayed horizontal pulse having a phase difference of 100 degrees, a first reading circuit that reads the composite synchronizing signal at the leading edge of the delayed horizontal pulse, and a second reading circuit that reads the composite synchronizing signal at the trailing edge of the delayed horizontal pulse; and a phase comparison circuit that compares the phases of the output pulses of the second reading circuit, and is configured to output signals of different levels depending on odd-numbered fields and even-numbered fields. 2. The field identification device according to claim 1, wherein a horizontal AFC circuit having an oscillation frequency that is an integral multiple of the horizontal frequency is used as the horizontal phase synchronization circuit. 3. The field according to claim 1, wherein a D flip-flop circuit is used as the delay circuit, and a 90 degree delay time is obtained by reading the horizontal pulse with a clock pulse having twice the horizontal frequency. Identification device.