JPS6489338A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6489338A
JPS6489338A JP12164488A JP12164488A JPS6489338A JP S6489338 A JPS6489338 A JP S6489338A JP 12164488 A JP12164488 A JP 12164488A JP 12164488 A JP12164488 A JP 12164488A JP S6489338 A JPS6489338 A JP S6489338A
Authority
JP
Japan
Prior art keywords
semiconductor device
conduction elements
fet
constituting
blown out
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12164488A
Other languages
Japanese (ja)
Inventor
Ii Fuitsutsupatoritsuku Maaku
Shii Gurahamu Andoriyu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gazelle Microcircuits Inc
Original Assignee
Gazelle Microcircuits Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gazelle Microcircuits Inc filed Critical Gazelle Microcircuits Inc
Publication of JPS6489338A publication Critical patent/JPS6489338A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE: To optimize the operational parameters of a device by constituting a semiconductor device of first and second transistors and first through fourth conduction elements for connecting them and making desired conduction elements of laser programmable fuses which can be blown out. CONSTITUTION: When the size of an MESFET 40A constituting a semiconductor device increases, an external current increases to raise the operating speed. Consequently, a desired operating rate is set for a predetermined power level by selecting the size of the FET 40A appropriately. Alternatively, the characteristics are corrected by connecting a larger number of secondary elements if the threshold voltage of the FET 40A is high at the time of first inspection and thereby the operating speed of the circuit is reduced. Because of this, at least two of first to fourth conduction elements are formed of laser programmable fuses 80 which are blown out by irradiating laser so that characteristics satisfying a purpose are exhibited.
JP12164488A 1987-05-19 1988-05-18 Semiconductor device Pending JPS6489338A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5209887A 1987-05-19 1987-05-19

Publications (1)

Publication Number Publication Date
JPS6489338A true JPS6489338A (en) 1989-04-03

Family

ID=21975461

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12164488A Pending JPS6489338A (en) 1987-05-19 1988-05-18 Semiconductor device

Country Status (3)

Country Link
JP (1) JPS6489338A (en)
DE (1) DE3817114A1 (en)
GB (1) GB2206730A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02189607A (en) * 1989-01-18 1990-07-25 Seiko Instr Inc Voltage regulator
DE69411368T2 (en) * 1994-05-30 1998-10-22 St Microelectronics Srl Circuit for selecting design options in an integrated circuit
US6100747A (en) * 1994-05-30 2000-08-08 Stmicroelectronics, S.R.L. Device for selecting design options in an integrated circuit
DE69712302T2 (en) 1996-12-31 2002-10-24 Stmicroelectronics, Inc. Structure and component for selecting design options in an integrated circuit
ITMI20110844A1 (en) * 2011-05-13 2012-11-14 St Microelectronics Srl ELECTRONIC TRIMMING CIRCUIT

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA997868A (en) * 1972-12-20 1976-09-28 David J. Fullagar Digital adjustment of linear circuits
US4306246A (en) * 1976-09-29 1981-12-15 Motorola, Inc. Method for trimming active semiconductor devices
US4238839A (en) * 1979-04-19 1980-12-09 National Semiconductor Corporation Laser programmable read only memory
US4412241A (en) * 1980-11-21 1983-10-25 National Semiconductor Corporation Multiple trim structure
JPS5846174B2 (en) * 1981-03-03 1983-10-14 株式会社東芝 semiconductor integrated circuit

Also Published As

Publication number Publication date
GB8811703D0 (en) 1988-06-22
GB2206730A (en) 1989-01-11
DE3817114A1 (en) 1988-12-15

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