JPS648669U - - Google Patents
Info
- Publication number
- JPS648669U JPS648669U JP10237387U JP10237387U JPS648669U JP S648669 U JPS648669 U JP S648669U JP 10237387 U JP10237387 U JP 10237387U JP 10237387 U JP10237387 U JP 10237387U JP S648669 U JPS648669 U JP S648669U
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- pulse signal
- circuit
- input
- reference pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005259 measurement Methods 0.000 claims description 3
- 230000001960 triggered effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Manipulation Of Pulses (AREA)
- Pulse Circuits (AREA)
Description
第１図および第５図は本考案のパルス信号間引
き回路の一実施例を示す構成図、第２図〜第４図
はその動作状態を示す波形図、第６図〜第８図は
本考案のパルス信号間引き回路を適用すべきパル
ス幅測定回路の一例を示す構成図および動作波形
図である。
１……パルス幅測定回路、２……データ処理部
、３……パルス信号間引き回路、３０……基準パ
ルス発生回路、３１……判別回路、３２……ゲー
ト回路、３１１〜３１４……フリツプフロツプ回
路、３２……デイレイライン、３３１〜３３５…
…論理回路、３４１，３４２……インバータ、３
５１，３５２……バツフア。
1 and 5 are block diagrams showing one embodiment of the pulse signal thinning circuit of the present invention, FIGS. 2 to 4 are waveform diagrams showing its operating status, and FIGS. 6 to 8 are diagrams showing an embodiment of the pulse signal thinning circuit of the present invention. FIG. 2 is a configuration diagram and an operation waveform diagram showing an example of a pulse width measuring circuit to which the pulse signal thinning circuit of FIG. DESCRIPTION OF SYMBOLS 1... Pulse width measurement circuit, 2... Data processing section, 3... Pulse signal thinning circuit, 30... Reference pulse generation circuit, 31... Discrimination circuit, 32... Gate circuit, 3 11 to 3 14 ... Flip-flop circuit, 3 2 ... delay line, 3 31 to 3 35 ...
...Logic circuit, 3 41 , 3 42 ...Inverter, 3
51 , 3 52 ...Batsuhua.
Claims (1)
測定回路等に連続して印加されるパルス信号のパ
ルス間隔を観察してこのパルス間隔が常に所定の
時間より長くなるようにパルス信号を適宜間引き
するパルス信号間引き回路において、入力パルス
信号の立下りによりトリガされ一定時間幅の基準
パルスを発生する基準パルス発生回路と、この基
準パルスとこの基準パルスをトリガした入力パル
ス信号の次に印加される入力パルス信号とを比較
して基準パルスが発生されている間に次の入力パ
ルス信号が印加されたか否かを判別する判別回路
と、この判別回路の出力に応じて入力パルス信号
を１つおきに間引くゲート回路とを具備してなる
パルス信号間引き回路。 It is inserted before the pulse width measurement circuit, etc., and observes the pulse interval of the pulse signal that is continuously applied to the pulse width measurement circuit, etc., and thins out the pulse signal appropriately so that the pulse interval is always longer than a predetermined time. In a pulse signal thinning circuit, there is a reference pulse generation circuit that is triggered by the falling edge of an input pulse signal and generates a reference pulse of a fixed time width, and an input that is applied next to this reference pulse and the input pulse signal that triggered this reference pulse. A discrimination circuit that compares the pulse signal with the reference pulse to determine whether or not the next input pulse signal was applied while the reference pulse was being generated; A pulse signal thinning circuit comprising a thinning gate circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10237387U JPH0611483Y2 (en) | 1987-07-03 | 1987-07-03 | Pulse signal thinning circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10237387U JPH0611483Y2 (en) | 1987-07-03 | 1987-07-03 | Pulse signal thinning circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS648669U true JPS648669U (en) | 1989-01-18 |
| JPH0611483Y2 JPH0611483Y2 (en) | 1994-03-23 |
Family
ID=31332225
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10237387U Expired - Lifetime JPH0611483Y2 (en) | 1987-07-03 | 1987-07-03 | Pulse signal thinning circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0611483Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2010137076A1 (en) * | 2009-05-28 | 2012-11-12 | 株式会社アドバンテスト | PULSE MEASURING DEVICE, PULSE MEASURING METHOD, AND TEST DEVICE USING THEM |
-
1987
- 1987-07-03 JP JP10237387U patent/JPH0611483Y2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2010137076A1 (en) * | 2009-05-28 | 2012-11-12 | 株式会社アドバンテスト | PULSE MEASURING DEVICE, PULSE MEASURING METHOD, AND TEST DEVICE USING THEM |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0611483Y2 (en) | 1994-03-23 |
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