JPS63125426U - - Google Patents
Info
- Publication number
- JPS63125426U JPS63125426U JP1741787U JP1741787U JPS63125426U JP S63125426 U JPS63125426 U JP S63125426U JP 1741787 U JP1741787 U JP 1741787U JP 1741787 U JP1741787 U JP 1741787U JP S63125426 U JPS63125426 U JP S63125426U
- Authority
- JP
- Japan
- Prior art keywords
- pulse signal
- circuit
- logical product
- regular
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Safety Devices In Control Systems (AREA)
- Manipulation Of Pulses (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Description
第１図は本考案の一実施例に係わるノイズ検知
回路を数値制御装置に適応した場合の回路構成を
示すブロツク図、第２図は同実施例における単安
定マルチバイブレータの入出力特性を示す図、第
３図は同実施例におけるノイズ検知回路の動作を
説明するためのタイミングチヤートである。
１１…ノイズ検知回路、１２…単安定マルチバ
イブレータ、１３…論理積回路、１４…記憶回路
、Ｘ…ノイズ検知入力端子、Ｃ…リセツト信号端
子、Ｚ…出力信号端子。
Fig. 1 is a block diagram showing the circuit configuration when a noise detection circuit according to an embodiment of the present invention is applied to a numerical control device, and Fig. 2 is a diagram showing the input/output characteristics of a monostable multivibrator in the same embodiment. , FIG. 3 is a timing chart for explaining the operation of the noise detection circuit in the same embodiment. DESCRIPTION OF SYMBOLS 11... Noise detection circuit, 12... Monostable multivibrator, 13... AND circuit, 14... Memory circuit, X... Noise detection input terminal, C... Reset signal terminal, Z... Output signal terminal.
Claims (1)
外のノイズ信号が混入したことを検知するノイズ
検知回路において、正規パルス信号の立ち下がり
に同期して一定時間幅のパルス信号を発生するパ
ルス信号発生回路と、このパルス信号発生回路か
ら発生されるパルス信号と上記正規パルス信号と
の論理積を取る論理積回路と、この論理積回路の
演算結果に基づいて上記正規パルス信号に対する
ノイズ信号の混入を判定し、この判定結果を記憶
する記憶回路とを具備したことを特徴とするノイ
ズ検知回路。 In a noise detection circuit that detects that a noise signal other than a regular pulse signal has entered a signal line that transmits a pulse train, a pulse signal generation circuit that generates a pulse signal of a fixed time width in synchronization with the falling edge of a regular pulse signal. , an AND circuit that takes the logical product of the pulse signal generated from the pulse signal generation circuit and the regular pulse signal; and a logical product circuit that determines whether a noise signal is mixed into the regular pulse signal based on the calculation result of the logical product circuit. , and a memory circuit that stores the determination result.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1741787U JPS63125426U (en) | 1987-02-09 | 1987-02-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1741787U JPS63125426U (en) | 1987-02-09 | 1987-02-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63125426U true JPS63125426U (en) | 1988-08-16 |
Family
ID=30810159
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1741787U Pending JPS63125426U (en) | 1987-02-09 | 1987-02-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63125426U (en) |
-
1987
- 1987-02-09 JP JP1741787U patent/JPS63125426U/ja active Pending
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