JPS60121351U - Pilot signal identification circuit - Google Patents

Pilot signal identification circuit

Info

Publication number
JPS60121351U
JPS60121351U JP1984008889U JP888984U JPS60121351U JP S60121351 U JPS60121351 U JP S60121351U JP 1984008889 U JP1984008889 U JP 1984008889U JP 888984 U JP888984 U JP 888984U JP S60121351 U JPS60121351 U JP S60121351U
Authority
JP
Japan
Prior art keywords
pilot signal
identification circuit
signal identification
logic value
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984008889U
Other languages
Japanese (ja)
Other versions
JPH0434601Y2 (en
Inventor
佐々木　三利
浅場　康次
浩之 新谷
Original Assignee
富士通テン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通テン株式会社 filed Critical 富士通テン株式会社
Priority to JP1984008889U priority Critical patent/JPS60121351U/en
Publication of JPS60121351U publication Critical patent/JPS60121351U/en
Application granted granted Critical
Publication of JPH0434601Y2 publication Critical patent/JPH0434601Y2/ja
Granted legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例の構成ブロック図、第２図は
第１図の回路の動作を説明するためのタイムチャートで
ある。FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a time chart for explaining the operation of the circuit shown in FIG.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] パイロット信号検出回路の後段に、該検出結果を表示す
る論理値を所定時間遅延せしめる遅延手段及び該遅延後
の論理値により前言己遅延前の論理値のラッチを可能に
するラッチ回路を付加したこ−とを特徴とするパイロッ
ト信号検出回路。A delay means for delaying the logic value for displaying the detection result by a predetermined period of time and a latch circuit for making it possible to latch the logic value before the delay using the logic value after the delay are added to the subsequent stage of the pilot signal detection circuit. - A pilot signal detection circuit characterized by.
JP1984008889U 1984-01-25 1984-01-25 Pilot signal identification circuit Granted JPS60121351U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984008889U JPS60121351U (en) 1984-01-25 1984-01-25 Pilot signal identification circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984008889U JPS60121351U (en) 1984-01-25 1984-01-25 Pilot signal identification circuit

Publications (2)

Publication Number Publication Date
JPS60121351U true JPS60121351U (en) 1985-08-16
JPH0434601Y2 JPH0434601Y2 (en) 1992-08-18

Family

ID=30488588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984008889U Granted JPS60121351U (en) 1984-01-25 1984-01-25 Pilot signal identification circuit

Country Status (1)

Country Link
JP (1) JPS60121351U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS579143A (en) * 1980-06-18 1982-01-18 Sanyo Electric Co Ltd Am stereo receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS579143A (en) * 1980-06-18 1982-01-18 Sanyo Electric Co Ltd Am stereo receiver

Also Published As

Publication number Publication date
JPH0434601Y2 (en) 1992-08-18

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