JPS648492B2 - - Google Patents

Info

Publication number
JPS648492B2
JPS648492B2 JP19037384A JP19037384A JPS648492B2 JP S648492 B2 JPS648492 B2 JP S648492B2 JP 19037384 A JP19037384 A JP 19037384A JP 19037384 A JP19037384 A JP 19037384A JP S648492 B2 JPS648492 B2 JP S648492B2
Authority
JP
Japan
Prior art keywords
line
control
josephson
bias current
gate circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP19037384A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6167317A (ja
Inventor
Takuji Nakanishi
Haruo Yoshikyo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP19037384A priority Critical patent/JPS6167317A/ja
Publication of JPS6167317A publication Critical patent/JPS6167317A/ja
Publication of JPS648492B2 publication Critical patent/JPS648492B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Pulse Circuits (AREA)
JP19037384A 1984-09-11 1984-09-11 ジヨセフソンパルス発生回路 Granted JPS6167317A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19037384A JPS6167317A (ja) 1984-09-11 1984-09-11 ジヨセフソンパルス発生回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19037384A JPS6167317A (ja) 1984-09-11 1984-09-11 ジヨセフソンパルス発生回路

Publications (2)

Publication Number Publication Date
JPS6167317A JPS6167317A (ja) 1986-04-07
JPS648492B2 true JPS648492B2 (enrdf_load_stackoverflow) 1989-02-14

Family

ID=16257095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19037384A Granted JPS6167317A (ja) 1984-09-11 1984-09-11 ジヨセフソンパルス発生回路

Country Status (1)

Country Link
JP (1) JPS6167317A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6167317A (ja) 1986-04-07

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