JPS6479839A - Program monitor - Google Patents

Program monitor

Info

Publication number
JPS6479839A
JPS6479839A JP62236157A JP23615787A JPS6479839A JP S6479839 A JPS6479839 A JP S6479839A JP 62236157 A JP62236157 A JP 62236157A JP 23615787 A JP23615787 A JP 23615787A JP S6479839 A JPS6479839 A JP S6479839A
Authority
JP
Japan
Prior art keywords
address
debugging
program
cpu
debugged
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62236157A
Other languages
Japanese (ja)
Inventor
Tadashi Matsuzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62236157A priority Critical patent/JPS6479839A/en
Publication of JPS6479839A publication Critical patent/JPS6479839A/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To debug a program to be debugged without stopping the debugging by interrupting a CPU based on a coincidence signal obtained by comparing a brake address set up in an address recognizer (AR) with an address signal from the CPU to execute debugging and then returning the debugging to the program to be debugged. CONSTITUTION:An address coincidence signal obtained by storing a brake address previously set up in the AR 3 and comparing the stored brake address with an address signal inputted from a CPU 11 is used as an interruption signal to interrupt the CPU 11, and in the interrupting processing, previously set up debugging processing is executed, the debugging is returned to the program to be debugged and then a message is transmitted to a host machine 2 at a proper time. Thus, a program monitor capable of executing so-called real time debugging can be obtained.
JP62236157A 1987-09-22 1987-09-22 Program monitor Pending JPS6479839A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62236157A JPS6479839A (en) 1987-09-22 1987-09-22 Program monitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62236157A JPS6479839A (en) 1987-09-22 1987-09-22 Program monitor

Publications (1)

Publication Number Publication Date
JPS6479839A true JPS6479839A (en) 1989-03-24

Family

ID=16996608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62236157A Pending JPS6479839A (en) 1987-09-22 1987-09-22 Program monitor

Country Status (1)

Country Link
JP (1) JPS6479839A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008033849A (en) * 2006-08-01 2008-02-14 Hitachi Ltd Fault analysis system
WO2018168735A1 (en) 2017-03-13 2018-09-20 三菱マテリアル株式会社 Hard sintered body

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008033849A (en) * 2006-08-01 2008-02-14 Hitachi Ltd Fault analysis system
WO2018168735A1 (en) 2017-03-13 2018-09-20 三菱マテリアル株式会社 Hard sintered body

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