JPS6477390A - Chrominance signal line discriminating circuit - Google Patents

Chrominance signal line discriminating circuit

Info

Publication number
JPS6477390A
JPS6477390A JP62233788A JP23378887A JPS6477390A JP S6477390 A JPS6477390 A JP S6477390A JP 62233788 A JP62233788 A JP 62233788A JP 23378887 A JP23378887 A JP 23378887A JP S6477390 A JPS6477390 A JP S6477390A
Authority
JP
Japan
Prior art keywords
line
output
signal
horizontal period
chrominance signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62233788A
Other languages
Japanese (ja)
Inventor
Akiyuki Yoshida
Kenji Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62233788A priority Critical patent/JPS6477390A/en
Publication of JPS6477390A publication Critical patent/JPS6477390A/en
Pending legal-status Critical Current

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Landscapes

  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To execute a line discrimination without an adjustment but accurately and stably by detecting the ID frequency of a previous line and a present line for every line, using the comparative output of the frequency of the obtained previous line and present line to discriminate the line, in a SECAM system. CONSTITUTION:In a flip flop 12, the rise of a burst flag signal from an input terminal 11 is detected, a Q output and a Q' output whose levels invert every horizontal period are formed and as the outputs of AND circuits 13 and 14, outputs to become higher level in the non-modulating carrier interval of a FM- modulated line sequentializing chrominance signal to be supplied to an input terminal 1 are alternately formed every horizontal period. By this output, switching circuits 3 and 5 are controlled, the level of a line ID signal is sampled and held by capacitor 4 and 6 alternately every horizontal period and the two are compared in a comparing circuit 7. In an Ex-OR circuit 9, an exclusive OR of the comparative output of the comparing circuit 7 and the Q output on the flip flop 12 are formed and removed from an output terminal as a line discriminating signal.
JP62233788A 1987-09-18 1987-09-18 Chrominance signal line discriminating circuit Pending JPS6477390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62233788A JPS6477390A (en) 1987-09-18 1987-09-18 Chrominance signal line discriminating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62233788A JPS6477390A (en) 1987-09-18 1987-09-18 Chrominance signal line discriminating circuit

Publications (1)

Publication Number Publication Date
JPS6477390A true JPS6477390A (en) 1989-03-23

Family

ID=16960577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62233788A Pending JPS6477390A (en) 1987-09-18 1987-09-18 Chrominance signal line discriminating circuit

Country Status (1)

Country Link
JP (1) JPS6477390A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100709660B1 (en) * 2002-02-27 2007-04-24 히다치 가세고교 가부시끼가이샤 Encapsulating Epoxy Resin Composition, and Electronic Parts Device Using the Same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100709660B1 (en) * 2002-02-27 2007-04-24 히다치 가세고교 가부시끼가이샤 Encapsulating Epoxy Resin Composition, and Electronic Parts Device Using the Same

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