JPH0373087U - - Google Patents

Info

Publication number
JPH0373087U
JPH0373087U JP13462489U JP13462489U JPH0373087U JP H0373087 U JPH0373087 U JP H0373087U JP 13462489 U JP13462489 U JP 13462489U JP 13462489 U JP13462489 U JP 13462489U JP H0373087 U JPH0373087 U JP H0373087U
Authority
JP
Japan
Prior art keywords
circuit
luminance signal
synchronization
signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13462489U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13462489U priority Critical patent/JPH0373087U/ja
Publication of JPH0373087U publication Critical patent/JPH0373087U/ja
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)
  • Television Signal Processing For Recording (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の一実施例を示す回路図、第
2図は従来のクランプ回路を示す回路図、第3図
イ及びロは第2図の説明に供する為の波形図、第
4図イ乃至ホは第1図の説明に供する為の波形図
、及び第5図は第1図の具体回路例を示す回路図
である。 8……FM復調回路、12……クランプ回路、
13……ドロツプアウト検出回路、14……ピー
クホールド回路、15……コンパレータ、16…
…同期分離回路、17……スイツチ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional clamp circuit, FIG. 3 A and B are waveform diagrams for explaining FIG. 2, and FIG. 1 through 5 are waveform diagrams for explaining FIG. 1, and FIG. 5 is a circuit diagram showing a specific circuit example of FIG. 1. 8...FM demodulation circuit, 12...clamp circuit,
13... Dropout detection circuit, 14... Peak hold circuit, 15... Comparator, 16...
...Synchronization separation circuit, 17...switch.

Claims (1)

【実用新案登録請求の範囲】 (1) FM復調された輝度信号中の同期信号を分
離する同期分離回路と、 該同期分離回路からの同期信号に応じて、輝度
信号のクランプを行なうクランプ回路と、 FM変調されている輝度信号のドロツプアウト
を検出するドロツプアウト検出回路と、 該ドロツプアウト検出回路の検出出力をピーク
ホールドするピークホールド回路と、 該ピークホールド回路の出力信号をレベル判別
するコンパレータと、 該コンパレータの判別出力に応じて前記同期分
離回路の出力同期信号が前記クランプ回路に加わ
るのを遮断するスイツチとを備えることを特徴と
する輝度信号処理回路。 (2) 前記クランプ回路の前段には輝度信号が印
加されるローパスフイルタが配置され、前記ロー
パスフイルタの時間遅れに応じて前記ピークホー
ルド回路の放電時定数を設定するようにしたこと
を特徴とする請求項第1項記載の輝度信号処理回
路。
[Claims for Utility Model Registration] (1) A synchronization separation circuit that separates a synchronization signal in an FM demodulated luminance signal, and a clamp circuit that clamps the luminance signal in accordance with the synchronization signal from the synchronization separation circuit. , a dropout detection circuit that detects a dropout of an FM-modulated luminance signal, a peak hold circuit that peak-holds the detection output of the dropout detection circuit, a comparator that determines the level of the output signal of the peak hold circuit, and the comparator. A brightness signal processing circuit comprising: a switch that blocks the output synchronization signal of the synchronization separation circuit from being applied to the clamp circuit in accordance with the discrimination output of the luminance signal processing circuit. (2) A low-pass filter to which a luminance signal is applied is arranged before the clamp circuit, and the discharge time constant of the peak-hold circuit is set according to the time delay of the low-pass filter. A luminance signal processing circuit according to claim 1.
JP13462489U 1989-11-20 1989-11-20 Pending JPH0373087U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13462489U JPH0373087U (en) 1989-11-20 1989-11-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13462489U JPH0373087U (en) 1989-11-20 1989-11-20

Publications (1)

Publication Number Publication Date
JPH0373087U true JPH0373087U (en) 1991-07-23

Family

ID=31681948

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13462489U Pending JPH0373087U (en) 1989-11-20 1989-11-20

Country Status (1)

Country Link
JP (1) JPH0373087U (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5782215A (en) * 1980-11-11 1982-05-22 Pioneer Video Corp Dropout compensation circuit
JPS58212278A (en) * 1982-06-03 1983-12-09 Mitsubishi Electric Corp Synchronizing separator circuit
JPS6361583A (en) * 1986-09-01 1988-03-17 Matsushita Electric Ind Co Ltd Recording and reproducing device
JPS6387085A (en) * 1986-09-30 1988-04-18 Sony Corp Agc circuit
JPS6387075A (en) * 1986-09-30 1988-04-18 Toshiba Corp Synchronous error checking method for reception picture data

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5782215A (en) * 1980-11-11 1982-05-22 Pioneer Video Corp Dropout compensation circuit
JPS58212278A (en) * 1982-06-03 1983-12-09 Mitsubishi Electric Corp Synchronizing separator circuit
JPS6361583A (en) * 1986-09-01 1988-03-17 Matsushita Electric Ind Co Ltd Recording and reproducing device
JPS6387085A (en) * 1986-09-30 1988-04-18 Sony Corp Agc circuit
JPS6387075A (en) * 1986-09-30 1988-04-18 Toshiba Corp Synchronous error checking method for reception picture data

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