JPS6476752A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6476752A
JPS6476752A JP62233416A JP23341687A JPS6476752A JP S6476752 A JPS6476752 A JP S6476752A JP 62233416 A JP62233416 A JP 62233416A JP 23341687 A JP23341687 A JP 23341687A JP S6476752 A JPS6476752 A JP S6476752A
Authority
JP
Japan
Prior art keywords
region
diffusion layer
concentration
low concentration
implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62233416A
Other languages
Japanese (ja)
Inventor
Takumi Fujimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62233416A priority Critical patent/JPS6476752A/en
Publication of JPS6476752A publication Critical patent/JPS6476752A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection

Abstract

PURPOSE:To obtain a desired resistance value without elongating an input protecting resistance, and improve dielectric strength of electrostatic charge, by forming the input protecting resistance, of a second conductivity type low concentration diffusion layer, and arranging a second conductivity type diffusion layer of intermediate concentration, between a second conductivity type high concentration diffusion layer of the connecting part with a wiring, and said low concentration diffusion layer. CONSTITUTION:Boron ion is implanted by applying SiO2 formed on the surface of an N-type substrate 1 to a mask, and diffused to formed a P<--> low concentration diffusion layer 2 as a high resistive region. After an oxide film 31 is formed, boron ion is again implanted, a P<-> type diffusion layer 7 of intermediate concentration is formed. Further, boron ion is implanted, and in the same manner as prior arts, a P<+> region 4 is formed at the same time of a source.drain region of a P-channel MOS. By forming the diffusion region 7 of intermediate concentration, between the low concentration region 2 and the high concentration region 4, junction destruction due to current concentration, which occurs at the junction part between P<+> region and P<--> region, in particular, in the vicinity of an oxide film, can be reduced. Since it is not necessary to decrease the resistance of the low concentration P<--> region 2, the area of an input protecting part is not enlarged.
JP62233416A 1987-09-17 1987-09-17 Semiconductor device Pending JPS6476752A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62233416A JPS6476752A (en) 1987-09-17 1987-09-17 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62233416A JPS6476752A (en) 1987-09-17 1987-09-17 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6476752A true JPS6476752A (en) 1989-03-22

Family

ID=16954719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62233416A Pending JPS6476752A (en) 1987-09-17 1987-09-17 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6476752A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831317A (en) * 1993-05-25 1998-11-03 Matsushita Electronics Corporation Semiconductor device and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831317A (en) * 1993-05-25 1998-11-03 Matsushita Electronics Corporation Semiconductor device and manufacture thereof

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