JPS6476714A - Semiconductor substrate - Google Patents

Semiconductor substrate

Info

Publication number
JPS6476714A
JPS6476714A JP23232187A JP23232187A JPS6476714A JP S6476714 A JPS6476714 A JP S6476714A JP 23232187 A JP23232187 A JP 23232187A JP 23232187 A JP23232187 A JP 23232187A JP S6476714 A JPS6476714 A JP S6476714A
Authority
JP
Japan
Prior art keywords
layer
semiconductor substrate
concentration semiconductor
dislocation
slip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23232187A
Other languages
Japanese (ja)
Other versions
JPH06101444B2 (en
Inventor
Toshiaki Takada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62232321A priority Critical patent/JPH06101444B2/en
Publication of JPS6476714A publication Critical patent/JPS6476714A/en
Publication of JPH06101444B2 publication Critical patent/JPH06101444B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate a misfitting dislocation and a slip and to improve the yield of an element by employing a silicon semiconductor substrate of 2-layer structure in which the ranges of the resistivity of a P-type high concentration semiconductor substrate and the thickness of a P-type low concentration semiconductor layer are limited. CONSTITUTION:When a bipolar semiconductor IC or LSI is manufactured, it is heat treated at a high temperature of approx. 900-1200 deg.C in the steps of growing an epitaxial silicon layer, thermally oxidizing the surface of the layer, diffusing in case of forming a base, an emitter, a resistor and the like. Thus, a misfitting dislocation or a slip occurs due to the mismatching of a lattice in a boundary between a P-type high concentration semiconductor substrate and a P-type low concentration semiconductor layer. Accordingly, in order to prevent the manufacturing yield from decreasing, ranges in which no misfit dislocation and slip occur are set from a correlation diagram such that the resistivity the substrate is 20/1000OMEGAcm or more and the thickness of the layer is 10mum or less.
JP62232321A 1987-09-18 1987-09-18 Semiconductor substrate Expired - Lifetime JPH06101444B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62232321A JPH06101444B2 (en) 1987-09-18 1987-09-18 Semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62232321A JPH06101444B2 (en) 1987-09-18 1987-09-18 Semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS6476714A true JPS6476714A (en) 1989-03-22
JPH06101444B2 JPH06101444B2 (en) 1994-12-12

Family

ID=16937367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62232321A Expired - Lifetime JPH06101444B2 (en) 1987-09-18 1987-09-18 Semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH06101444B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011187651A (en) * 2010-03-08 2011-09-22 Sumco Corp Epitaxial wafer manufacturing method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5235584A (en) * 1975-09-13 1977-03-18 Sony Corp Manufacturing process of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5235584A (en) * 1975-09-13 1977-03-18 Sony Corp Manufacturing process of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011187651A (en) * 2010-03-08 2011-09-22 Sumco Corp Epitaxial wafer manufacturing method

Also Published As

Publication number Publication date
JPH06101444B2 (en) 1994-12-12

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