JPS6129537B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention particularly relates to a method for manufacturing semiconductor devices such as bipolar ICs.

Conventionally, in epitaxial wafers used for bipolar ICs and the like, an N-type or P-type buried layer is formed, and then epitaxial growth is performed after the oxide film is completely removed. These N-type or P-type buried layers generally receive considerable contamination from the outside because thermal diffusion methods at high temperatures are used. Furthermore, since epitaxial growth is carried out at high temperatures, dirt is introduced during epitaxial growth as well. In this way, dirt is introduced during various processes and affects the properties. Furthermore, when insulation is provided after epitaxial growth, P-type impurities are generally diffused from the surface of the epitaxial wafer to isolate elements from the P-type substrate. However, since the P-type impurity is introduced using a thermal diffusion method, the impurity is diffused in the lateral direction, which impairs the degree of integration. Furthermore, thermal diffusion at high temperatures causes redistribution of impurities, which impairs the yield of bipolar IC characteristics.

The purpose of the present invention is to provide an epitaxial wafer for bipolar and other semiconductor integrated circuits with the effect of gettering heavy metals, increase the diffusion coefficient of impurities, and provide insulation at as low a temperature as possible. After the epitaxial growth, ions such as ⁴⁰ Ar ⁺ ions are implanted. Ion implantation selectively forms a strained layer on the silicon surface at an appropriate implantation dose. This strained layer becomes a core that provides an important effect during the next epitaxial growth.

According to the present invention, it is possible to produce an epitaxial wafer in which the wafer has a region with a large diffusion coefficient partially and a gettering effect partially.

The present invention will be explained in detail below using the drawings. First, as shown in FIG. 1, a silicon oxide film 4 is grown on the upper surface of a P-type silicon substrate 1 at a temperature of about 1000 to 1400°C by a conventional method, and then selected using a photoresist method. By selectively removing the oxide film, a region for selective diffusion is formed. Next, at a temperature around 1200 to 1230°C, antimony diffuses arsenic impurities to form an N-type buried layer 2, and then uses the same method to diffuse boron impurities to form a P-type buried layer 2. A layer 3 is formed. Next, the oxide film is selectively removed using a photoresist method, and the N
Ions such as ⁴⁰ Ar ⁺ , ¹⁶ O ⁺ , and ¹⁴ N ⁺ are implanted at appropriate doses into areas other than the type buried layer and the P type buried layer, and are deposited near the surface as shown in Figure 2. Strain layers 5 and 6 are formed partially. In this case, depending on various uses, the silicon oxide film may not be completely removed, but a thin layer may be left and ion implantation may be performed. However, the region where the semiconductor element is to be made must be completely free from the influence of ion implantation. Next, before epitaxial growth, the entire oxide film 4 is removed and the oxide film 4 is grown under appropriate conditions.
S ₁ H ₄ , SiC ₄ , at a temperature around 1000-1200℃
Silicon is epitaxially grown using SiH ₂ C ₂ , SiHC ₃ or the like. The layers 9 and 10 with good crystallinity can be formed by epitaxial growth. At the same time, a layer 7 having a large impurity diffusion coefficient and a layer 8 having a gettering effect can be formed at the same time.

As described above, according to the present invention, by partially implanting ions under appropriate conditions, the diffusion coefficient of boron can be increased, the lateral spread can be reduced, and the degree of integration can be improved. . Furthermore, since the temperature of insulation diffusion can be lowered and the diffusion time can be shortened, redistribution of impurities can be reduced and ICs can be manufactured with high yield.
Furthermore, since a layer with a gettering effect can be placed near the semiconductor element, it has a very large effect on contamination during epitaxial growth and subsequent processes, ensuring improved reliability and yield when manufacturing ICs. .

[Brief explanation of the drawing]

1, 2, and 3 are cross-sectional views for explaining the manufacturing process of an embodiment of the present invention. 1...Silicon substrate, 2...N-type buried layer, 3...P-type buried layer, 4...silicon oxide film, 5...Ion-implanted region in the P-type buried layer, 6...Ion-implanted into the silicon substrate Region, 7... Growth layer formed on the ion-implanted P-type buried layer, 8... Growth layer formed on the ion-implanted surface, 9... Epitaxial layer grown on the N-type buried layer, 10... Silicon A region with good crystallinity grown on a substrate.

Claims (1)

[Claims] 1. Forming a first buried layer of opposite conductivity type with high impurity concentration in a semiconductor substrate of one conductivity type and a second buried layer of one conductivity type around the first buried layer; a step of selectively implanting ions into a second buried layer and between the second buried layer and the first buried layer into a substrate surface separated from these two buried layers; and ion implantation. After that, by exposing the substrate surface and growing an epitaxial layer of the opposite conductivity type on the exposed surface, a region having a large impurity diffusion coefficient is selectively formed on the second buried layer. manufacturing a semiconductor device, comprising the step of: selectively forming a region having gettering ability on an ion-implanted region between the first buried layer and the second buried layer; Method.