JPS6473913A - Synchronizing signal detection system - Google Patents
Synchronizing signal detection systemInfo
- Publication number
- JPS6473913A JPS6473913A JP23174887A JP23174887A JPS6473913A JP S6473913 A JPS6473913 A JP S6473913A JP 23174887 A JP23174887 A JP 23174887A JP 23174887 A JP23174887 A JP 23174887A JP S6473913 A JPS6473913 A JP S6473913A
- Authority
- JP
- Japan
- Prior art keywords
- synchronizing signal
- edge pulse
- interval
- edge
- detected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE:To detect correctly a synchronizing signal by masking the intermediate period of two edge pulses at the stable detection of a synchronizing signal in comparing the interval of the two edge pulses of an input signal with a reference interval so as to detect the synchronizing signal. CONSTITUTION:The edge pulse of the input signal is detected to detect the interval of each edge pulse. When the interval between a 1st edge pulse and a 2nd edge pulse is equal to the preset prescribed reference interval, a detection signal for the synchronizing signal is outputted. When the synchronizing signal is detected stably, the intermediate edge pulse between the 1st edge pulse and the 2nd edge pulse is masked. The edge pulse at the initializing (the synchronizing signal is not stably detected) is not masked. Thus, the erroneous detection of the data as the synchronizing signal is prevented and even if an edge pulse due to a defect of a disk takes place in the middle of the reference interval, the synchronizing signal is detected stably.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23174887A JPH07109981B2 (en) | 1987-09-16 | 1987-09-16 | Sync signal detection circuit |
US07/162,625 US4872155A (en) | 1987-03-13 | 1988-03-01 | Clock generator circuit and a synchronizing signal detection method in a sampled format system and a phase comparator circuit suited for generation of the clock |
US07/367,771 US4982110A (en) | 1987-03-13 | 1989-06-19 | Clock generator circuit and a synchronizing signal detection method in a sampled format system and a phase comparator circuit suited for generation of the clock |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23174887A JPH07109981B2 (en) | 1987-09-16 | 1987-09-16 | Sync signal detection circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6473913A true JPS6473913A (en) | 1989-03-20 |
JPH07109981B2 JPH07109981B2 (en) | 1995-11-22 |
Family
ID=16928420
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23174887A Expired - Fee Related JPH07109981B2 (en) | 1987-03-13 | 1987-09-16 | Sync signal detection circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07109981B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5047658A (en) * | 1990-06-01 | 1991-09-10 | Ncr Corporation | High frequency asynchronous data synchronizer |
-
1987
- 1987-09-16 JP JP23174887A patent/JPH07109981B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5047658A (en) * | 1990-06-01 | 1991-09-10 | Ncr Corporation | High frequency asynchronous data synchronizer |
Also Published As
Publication number | Publication date |
---|---|
JPH07109981B2 (en) | 1995-11-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |