JPS6481576A - Frame detection circuit for television signal - Google Patents

Frame detection circuit for television signal

Info

Publication number
JPS6481576A
JPS6481576A JP23733687A JP23733687A JPS6481576A JP S6481576 A JPS6481576 A JP S6481576A JP 23733687 A JP23733687 A JP 23733687A JP 23733687 A JP23733687 A JP 23733687A JP S6481576 A JPS6481576 A JP S6481576A
Authority
JP
Japan
Prior art keywords
signal
frame
circuit
detection
identification signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23733687A
Other languages
Japanese (ja)
Inventor
Toshinori Otaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23733687A priority Critical patent/JPS6481576A/en
Publication of JPS6481576A publication Critical patent/JPS6481576A/en
Pending legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To attain frame detection even if a reproduction speed deviation of a VDP or the like takes place by using two kinds of frame identification signals with different waveform and three detection circuits. CONSTITUTION:A frame identification signal 4 has an alternate period being twice that of the frame identification signal 5. A video signal 31 is formed into a binarizing signal 10 by a comparator 9. The identification signal 4 is detected by the 1st detection circuit comprising a delay circuit 11 having a delay time being a half the period of the signal 4 and an exclusive OR circuit 15. In this case, a delay circuit 19 and an OR circuit 21 absorb a negative pulse in a short time based on the reproduction speed error end a consecutive detection signal 23 is obtained. Similarly, an identification signal 5 is detected by circuits 12, 16, 20, 22 and an output 24 is obtained. A frame discrimination circuit 29 outputs a frame detection output 30 when the time difference between the outputs 23, 24 is within the permissible range of one horizontal period.
JP23733687A 1987-09-24 1987-09-24 Frame detection circuit for television signal Pending JPS6481576A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23733687A JPS6481576A (en) 1987-09-24 1987-09-24 Frame detection circuit for television signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23733687A JPS6481576A (en) 1987-09-24 1987-09-24 Frame detection circuit for television signal

Publications (1)

Publication Number Publication Date
JPS6481576A true JPS6481576A (en) 1989-03-27

Family

ID=17013869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23733687A Pending JPS6481576A (en) 1987-09-24 1987-09-24 Frame detection circuit for television signal

Country Status (1)

Country Link
JP (1) JPS6481576A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5168716A (en) * 1974-12-11 1976-06-14 Matsushita Electric Ind Co Ltd FUIIRUDOHANBETSUSOCHI
JPS54162526A (en) * 1978-06-13 1979-12-24 Nippon Gakki Seizo Kk Vertical synchronizing detection system in pcm system recorder-reproducer
JPS6225579A (en) * 1985-07-26 1987-02-03 Sony Corp Synchronizing signal detecting circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5168716A (en) * 1974-12-11 1976-06-14 Matsushita Electric Ind Co Ltd FUIIRUDOHANBETSUSOCHI
JPS54162526A (en) * 1978-06-13 1979-12-24 Nippon Gakki Seizo Kk Vertical synchronizing detection system in pcm system recorder-reproducer
JPS6225579A (en) * 1985-07-26 1987-02-03 Sony Corp Synchronizing signal detecting circuit

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