JPS57152748A - Burst signal detecting circuit - Google Patents

Abstract

PURPOSE:To detect the break of a burst input, by using a clock regenerating circuit, which outputs a spacific number if pulses for one trigger input, and a circuit which detects that the output of the clock regenerating circuit is broken or intervals of pulses from the clock regenerating circuit are not constant. CONSTITUTION:When a burst CMI code is received, an output control circuit 4 is turned on by the brust rise signal, and the output of a decoder 3 is outputted. A clock regenerating circuit I outputs three continuous clocks for every change of the input from ''1'' to ''0''. The first delay circuit 6 compensates the lag due to the delay (0.75T) of the decoder 3, and clocks 10 and 11 delayed by one period and two periods are obtained in the second and the third delay circuits 7 and 8 respectively and are supplied to an OR circuit 12 to obtain regenerated clocks. The break of the input and the drop-out of regenerated clocks due to the disturbance of the CMI code rule are detected by a monostable multivibrator (T<pulse width<2T) having the retrigger function.