JPS57196362A - Monitoring method of composite computer system - Google Patents
Monitoring method of composite computer systemInfo
- Publication number
- JPS57196362A JPS57196362A JP56080252A JP8025281A JPS57196362A JP S57196362 A JPS57196362 A JP S57196362A JP 56080252 A JP56080252 A JP 56080252A JP 8025281 A JP8025281 A JP 8025281A JP S57196362 A JPS57196362 A JP S57196362A
- Authority
- JP
- Japan
- Prior art keywords
- computer
- computer system
- tnr
- tns
- response
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Multi Processors (AREA)
Abstract
PURPOSE:To pursue the cause and to take its proper measures, by detecting an abnormal delay immediately when it has occurred, in case of processing data of each computer. CONSTITUTION:A monitoring computer 6 (CPUi) is provided against a CPU1 of 1 and CPUs2-4 of 2. In this state, on each CPU, response functions 10, 20- 40 are provided. Also, it is supposed that from a monitoring function contained in the computer 6, diagnostic signals 61, 62-64 are transmitted at time t1S, t2S-tnS, respectively, and response signals 16, 26-46 reach the computer at t1R, t2R-tnR, respectively. In this case, the computer 6 calculates the response time of R1=t1R-t1S, R2=t2R-t2S,-Rn=tnR-tnS, and when the processing speed is delayed abnormally, it is detected immediately, and its cause is pursued.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56080252A JPS57196362A (en) | 1981-05-27 | 1981-05-27 | Monitoring method of composite computer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56080252A JPS57196362A (en) | 1981-05-27 | 1981-05-27 | Monitoring method of composite computer system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57196362A true JPS57196362A (en) | 1982-12-02 |
Family
ID=13713117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56080252A Pending JPS57196362A (en) | 1981-05-27 | 1981-05-27 | Monitoring method of composite computer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57196362A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115573A (en) * | 1981-12-29 | 1983-07-09 | Fujitsu Ltd | Data processing system |
JPS6425256A (en) * | 1987-07-21 | 1989-01-27 | Nec Corp | System for observing operation rate of processor |
-
1981
- 1981-05-27 JP JP56080252A patent/JPS57196362A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115573A (en) * | 1981-12-29 | 1983-07-09 | Fujitsu Ltd | Data processing system |
JPS6248263B2 (en) * | 1981-12-29 | 1987-10-13 | Fujitsu Ltd | |
JPS6425256A (en) * | 1987-07-21 | 1989-01-27 | Nec Corp | System for observing operation rate of processor |
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