JPS6473742A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6473742A
JPS6473742A JP22985887A JP22985887A JPS6473742A JP S6473742 A JPS6473742 A JP S6473742A JP 22985887 A JP22985887 A JP 22985887A JP 22985887 A JP22985887 A JP 22985887A JP S6473742 A JPS6473742 A JP S6473742A
Authority
JP
Japan
Prior art keywords
metal
edge parts
plasma etching
taper
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22985887A
Other languages
Japanese (ja)
Inventor
Hiroyuki Okada
Kazuo Fujiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP22985887A priority Critical patent/JPS6473742A/en
Publication of JPS6473742A publication Critical patent/JPS6473742A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a taper on the upper end edge parts of a wiring metal with good stability and with good reproducibility by a method wherein, after the side end parts of a photoresist are removed by oxygen plasma etching, the taper is formed on the upper end edge parts of the wiring metal by performing an additional etching with plasma. CONSTITUTION:An insulating film 2 is formed on a semiconductor substrate 1, a layer for a wiring metal 3 is formed on the film 2 and a photoresist 5 of a wiring pattern is formed thereon. Then, when the film of a metal 3 is subjected to plasma etching, the metal 3 provided with rectangularly formed upper end edge parts 3a is formed. Then, after the side end parts of the resist 5 remaining on the metal 3 are removed by oxygen plasma etching, the edge parts 3a of the metal 3 are further subjected to plasma etching using this resist 5 as a mask. Whereupon, a taper is formed on the edge parts 3a. Thereby, a protective film or the interlayer insulating film of a multilayer interconnection is prevented from overhanging in the latter process.
JP22985887A 1987-09-16 1987-09-16 Manufacture of semiconductor device Pending JPS6473742A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22985887A JPS6473742A (en) 1987-09-16 1987-09-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22985887A JPS6473742A (en) 1987-09-16 1987-09-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6473742A true JPS6473742A (en) 1989-03-20

Family

ID=16898795

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22985887A Pending JPS6473742A (en) 1987-09-16 1987-09-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6473742A (en)

Similar Documents

Publication Publication Date Title
JPS6413739A (en) Manufacture of order-made integrated circuit
US4362598A (en) Method of patterning a thick resist layer of polymeric plastic
JPS6473742A (en) Manufacture of semiconductor device
JPS54105476A (en) Manufacture of semiconductor device
JPS5710249A (en) Manufacture of semiconductor device
JPS5569264A (en) Etching method
JPS56114355A (en) Manufacture of semiconductor device
JPS5457982A (en) Manufacture for semiconductor device
JPS559415A (en) Semiconductor manufacturing method
JPS6473718A (en) Manufacture of semiconductor integrated circuit device
JPS5558552A (en) Metal wiring
JPS5553443A (en) Formation of electrode of semiconductor device
JPS5679451A (en) Production of semiconductor device
JPS6464237A (en) Forming method for multilayered interconnection in semiconductor device
JPS5493970A (en) Patttern forming method of multi-layer metallic thin film
JPS5655055A (en) Manufacture of semiconductor device
JPS5648151A (en) Wiring formation of semiconductor device
JPS6410540A (en) Formation of multilayer electrode
JPS6459935A (en) Formation of multilayer interconnection of semiconductor device
JPS6451698A (en) Manufacture of superconducting thin film multilayer board
JPS5792849A (en) Manufacture of semiconductor device
KR930011112A (en) How to Form Aluminum Wiring
JPS5750453A (en) Multilayer wiring method of semiconductor device
JPS57187954A (en) Formation of buried wiring
JPS6411345A (en) Formation of contact between interconnections