JPS647150A - Cpu peripheral input/output device - Google Patents

Cpu peripheral input/output device

Info

Publication number
JPS647150A
JPS647150A JP16086887A JP16086887A JPS647150A JP S647150 A JPS647150 A JP S647150A JP 16086887 A JP16086887 A JP 16086887A JP 16086887 A JP16086887 A JP 16086887A JP S647150 A JPS647150 A JP S647150A
Authority
JP
Japan
Prior art keywords
data
cpu
external device
comparator
output device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16086887A
Other languages
Japanese (ja)
Inventor
Masa Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16086887A priority Critical patent/JPS647150A/en
Publication of JPS647150A publication Critical patent/JPS647150A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To take out only a data string, which a CPU requires, from an external device by providing a CPU peripheral input/output device with a data comparator which compares data designated by the CPU with input data. CONSTITUTION:A CPU 1 preliminarily outputs data to be taken out to a data comparator 6 and outputs a mask signal to a latch circuit 8. When data occurs in an external device 2, data is sent to a data latch device 3 and the data comparator 6. The data comparator 6 compares data from the external device 2 with compare data preliminarily sent from the CPU 1 and causes an interrupt to the CPU 1 in case of coincidence between them. The CPU 1 uses the interrupt signal as a trigger to taken in data from an input port 4, and at this time, the CPU 1 controls a latch circuit 8 to arbitrarily select data from the external device 2.
JP16086887A 1987-06-30 1987-06-30 Cpu peripheral input/output device Pending JPS647150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16086887A JPS647150A (en) 1987-06-30 1987-06-30 Cpu peripheral input/output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16086887A JPS647150A (en) 1987-06-30 1987-06-30 Cpu peripheral input/output device

Publications (1)

Publication Number Publication Date
JPS647150A true JPS647150A (en) 1989-01-11

Family

ID=15724106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16086887A Pending JPS647150A (en) 1987-06-30 1987-06-30 Cpu peripheral input/output device

Country Status (1)

Country Link
JP (1) JPS647150A (en)

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