JPS57113145A - Bit-correspondence processing system of flip-flop group - Google Patents

Bit-correspondence processing system of flip-flop group

Info

Publication number
JPS57113145A
JPS57113145A JP55188287A JP18828780A JPS57113145A JP S57113145 A JPS57113145 A JP S57113145A JP 55188287 A JP55188287 A JP 55188287A JP 18828780 A JP18828780 A JP 18828780A JP S57113145 A JPS57113145 A JP S57113145A
Authority
JP
Japan
Prior art keywords
flip
register
bit
flop
specifying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55188287A
Other languages
Japanese (ja)
Inventor
Hajime Seto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55188287A priority Critical patent/JPS57113145A/en
Publication of JPS57113145A publication Critical patent/JPS57113145A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To achieve correspondence processing by fractionizing the state of peripheral equipment by previously specifying the group number of a flip-flop and a bit position in it, and then generating an interruption signal to a CPU only when the state of the equipment is coincident. CONSTITUTION:A specifying register IDR is stored with a flip-flop group number and information on the specification of a bit position in the same group. A setting specifying part ST inputs the input information to a specification information terminal IDT and when a register-storage command terminal RST is specified, this input information is stored in the register IDR. With a set key STB pressed, the circuit of a condition discriminating part CDD starts to compare the states of flip-flops, which correspond to devices, from a terminal FFGm with the contents of the register IDR. Then when a flip-flop group bit coincident with the specified contents of the register IDR turns on, the output CCS of the discrimination part CDD is used as the interruption signal to the CPU, which is then stopped.
JP55188287A 1980-12-29 1980-12-29 Bit-correspondence processing system of flip-flop group Pending JPS57113145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55188287A JPS57113145A (en) 1980-12-29 1980-12-29 Bit-correspondence processing system of flip-flop group

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55188287A JPS57113145A (en) 1980-12-29 1980-12-29 Bit-correspondence processing system of flip-flop group

Publications (1)

Publication Number Publication Date
JPS57113145A true JPS57113145A (en) 1982-07-14

Family

ID=16220986

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55188287A Pending JPS57113145A (en) 1980-12-29 1980-12-29 Bit-correspondence processing system of flip-flop group

Country Status (1)

Country Link
JP (1) JPS57113145A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6336338A (en) * 1986-07-28 1988-02-17 モトロ−ラ・インコ−ポレ−テッド Interrupt demand generator
JPH01130231A (en) * 1987-11-16 1989-05-23 Pfu Ltd Interruption generation control system
JPH04215134A (en) * 1990-02-13 1992-08-05 Internatl Business Mach Corp <Ibm> Data processing system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6336338A (en) * 1986-07-28 1988-02-17 モトロ−ラ・インコ−ポレ−テッド Interrupt demand generator
JPH01130231A (en) * 1987-11-16 1989-05-23 Pfu Ltd Interruption generation control system
JPH0532770B2 (en) * 1987-11-16 1993-05-17 Pfu Ltd
JPH04215134A (en) * 1990-02-13 1992-08-05 Internatl Business Mach Corp <Ibm> Data processing system

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