JPS5647150A - Received data control system - Google Patents

Received data control system

Info

Publication number
JPS5647150A
JPS5647150A JP12446279A JP12446279A JPS5647150A JP S5647150 A JPS5647150 A JP S5647150A JP 12446279 A JP12446279 A JP 12446279A JP 12446279 A JP12446279 A JP 12446279A JP S5647150 A JPS5647150 A JP S5647150A
Authority
JP
Japan
Prior art keywords
received
circuit
time
received data
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12446279A
Other languages
Japanese (ja)
Inventor
Seiji Ebihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12446279A priority Critical patent/JPS5647150A/en
Publication of JPS5647150A publication Critical patent/JPS5647150A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/20Arrangements for detecting or preventing errors in the information received using signal quality detector

Abstract

PURPOSE:To prevent a data transmission system from malfunctioning by sending a meaningless code out as received data in case that a received carrier is cut off. CONSTITUTION:On detecting the break of received carrier 13 at time t1, the 2nd received carrier detecting circuit 12 inverts its output 15 from ''1'' to ''0'' and the 1st received carrier detecting circuit 11, when the received carrier is not detected within the following time T1, considers data transmission to be completed and then inverts its output 14 from ''1'' to ''0'' at time t1+T1. Then, input 15 of AND circuit 17 changes into ''0'', and input 23 of AND circuit 22 changes into ''1'' through inverter 16. Therefore, received data 28, the output of AND circuit 27, is not received data 18, but meaningless code output 21 from inserted code generating circuit 20 in time t1-t1+T1, so that the data transmission system will never be brought under evil influence of unrequired received data 18 in time T1.
JP12446279A 1979-09-27 1979-09-27 Received data control system Pending JPS5647150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12446279A JPS5647150A (en) 1979-09-27 1979-09-27 Received data control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12446279A JPS5647150A (en) 1979-09-27 1979-09-27 Received data control system

Publications (1)

Publication Number Publication Date
JPS5647150A true JPS5647150A (en) 1981-04-28

Family

ID=14886113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12446279A Pending JPS5647150A (en) 1979-09-27 1979-09-27 Received data control system

Country Status (1)

Country Link
JP (1) JPS5647150A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5687176A (en) * 1995-06-09 1997-11-11 Hubbell Incorporated Zero byte substitution method and apparatus for telecommunications equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5687176A (en) * 1995-06-09 1997-11-11 Hubbell Incorporated Zero byte substitution method and apparatus for telecommunications equipment

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