JPS55143609A - Information processing method of sequencer - Google Patents

Information processing method of sequencer

Info

Publication number
JPS55143609A
JPS55143609A JP5316779A JP5316779A JPS55143609A JP S55143609 A JPS55143609 A JP S55143609A JP 5316779 A JP5316779 A JP 5316779A JP 5316779 A JP5316779 A JP 5316779A JP S55143609 A JPS55143609 A JP S55143609A
Authority
JP
Japan
Prior art keywords
control
input
signal
prom
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5316779A
Other languages
Japanese (ja)
Inventor
Toshiaki Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TAITETSUKU KK
Taiyo Kagaku Kogyo Co Ltd
Original Assignee
TAITETSUKU KK
Taiyo Kagaku Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TAITETSUKU KK, Taiyo Kagaku Kogyo Co Ltd filed Critical TAITETSUKU KK
Priority to JP5316779A priority Critical patent/JPS55143609A/en
Publication of JPS55143609A publication Critical patent/JPS55143609A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to exercise sequential control with efficiency by comparing a masked signal input to data of RAM and PROM brought under the control of CPU and then by outputting a coincidence signal as a control signal when the both agree with each other.
CONSTITUTION: Input signals IN1WINn and PR are input to mask part MASK, which masks parts unneeded as information and outputs needed information to comparator COMP. On the other hand, data in RAM and PROM are input to comparator COMP via an I/O port under the control of CPU and they are compared there with the masked signal inputs to output coincidence signals as driving signal for control members RY, SOL, etc., led out via an output port I/O. Consequently, sequential control can efficiently be exercised.
COPYRIGHT: (C)1980,JPO&Japio
JP5316779A 1979-04-26 1979-04-26 Information processing method of sequencer Pending JPS55143609A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5316779A JPS55143609A (en) 1979-04-26 1979-04-26 Information processing method of sequencer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5316779A JPS55143609A (en) 1979-04-26 1979-04-26 Information processing method of sequencer

Publications (1)

Publication Number Publication Date
JPS55143609A true JPS55143609A (en) 1980-11-10

Family

ID=12935291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5316779A Pending JPS55143609A (en) 1979-04-26 1979-04-26 Information processing method of sequencer

Country Status (1)

Country Link
JP (1) JPS55143609A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982001089A1 (en) * 1980-09-13 1982-04-01 Kitamura M Sequence control unit
JPS5899802A (en) * 1981-12-09 1983-06-14 Matsushita Electric Works Ltd Sequence controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982001089A1 (en) * 1980-09-13 1982-04-01 Kitamura M Sequence control unit
JPS5899802A (en) * 1981-12-09 1983-06-14 Matsushita Electric Works Ltd Sequence controller

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