JPS6470855A - Peripheral subsystem and data processing system and operation thereof - Google Patents

Peripheral subsystem and data processing system and operation thereof

Info

Publication number
JPS6470855A
JPS6470855A JP63204856A JP20485688A JPS6470855A JP S6470855 A JPS6470855 A JP S6470855A JP 63204856 A JP63204856 A JP 63204856A JP 20485688 A JP20485688 A JP 20485688A JP S6470855 A JPS6470855 A JP S6470855A
Authority
JP
Japan
Prior art keywords
maintenance
stopped
console panel
path
peripheral device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63204856A
Other languages
English (en)
Other versions
JPH0581942B2 (ja
Inventor
Kameron Baazurei Burento
Pooru Hefuaron Yuujin
Robaato Rinchi Kenesu
Aaru Shitsupuman Jiyunia Roido
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS6470855A publication Critical patent/JPS6470855A/ja
Publication of JPH0581942B2 publication Critical patent/JPH0581942B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/142—Reconfiguring to eliminate the error
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G06F11/201—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media between storage system components

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
JP63204856A 1987-08-28 1988-08-19 Peripheral subsystem and data processing system and operation thereof Granted JPS6470855A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US9072387A 1987-08-28 1987-08-28

Publications (2)

Publication Number Publication Date
JPS6470855A true JPS6470855A (en) 1989-03-16
JPH0581942B2 JPH0581942B2 (ja) 1993-11-16

Family

ID=22224006

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63204856A Granted JPS6470855A (en) 1987-08-28 1988-08-19 Peripheral subsystem and data processing system and operation thereof

Country Status (6)

Country Link
EP (1) EP0308056B1 (ja)
JP (1) JPS6470855A (ja)
AU (1) AU604350B2 (ja)
BR (1) BR8804289A (ja)
CA (1) CA1299757C (ja)
DE (1) DE3855673T2 (ja)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5107496A (en) * 1989-10-20 1992-04-21 International Business Machines Corp. Method and system for detecting and recovering from switching errors
US5963962A (en) 1995-05-31 1999-10-05 Network Appliance, Inc. Write anywhere file-system layout
US6138126A (en) 1995-05-31 2000-10-24 Network Appliance, Inc. Method for allocating files in a file system integrated with a raid disk sub-system
DE10240000A1 (de) * 2002-08-27 2004-03-18 Pact Xpp Technologies Ag Busssysteme und Rekonfigurationsverfahren
US7266725B2 (en) 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
DE19651075A1 (de) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654595A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
EP1329816B1 (de) 1996-12-27 2011-06-22 Richter, Thomas Verfahren zum selbständigen dynamischen Umladen von Datenflussprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o.dgl.)
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
US6516351B2 (en) 1997-12-05 2003-02-04 Network Appliance, Inc. Enforcing uniform file-locking for diverse file-locking protocols
DE19861088A1 (de) 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
US6457130B2 (en) 1998-03-03 2002-09-24 Network Appliance, Inc. File access control in a multi-protocol file server
US6279011B1 (en) 1998-06-19 2001-08-21 Network Appliance, Inc. Backup and restore for heterogeneous file server environment
US6574591B1 (en) 1998-07-31 2003-06-03 Network Appliance, Inc. File systems image transfer between dissimilar file systems
US6119244A (en) 1998-08-25 2000-09-12 Network Appliance, Inc. Coordinating persistent status information with multiple file servers
US6343984B1 (en) 1998-11-30 2002-02-05 Network Appliance, Inc. Laminar flow duct cooling system
WO2000034865A1 (de) * 1998-12-04 2000-06-15 Siemens Aktiengesellschaft Verfahren zur überwachung auf verfügbarkeit einer systemfunktion in einem rechner-system
US6457015B1 (en) 1999-05-07 2002-09-24 Network Appliance, Inc. Adaptive and generalized status monitor
CN1378665A (zh) 1999-06-10 2002-11-06 Pact信息技术有限公司 编程概念
US6467088B1 (en) * 1999-06-30 2002-10-15 Koninklijke Philips Electronics N.V. Reconfiguration manager for controlling upgrades of electronic devices
US6961749B1 (en) 1999-08-25 2005-11-01 Network Appliance, Inc. Scalable file server with highly available pairs
EP1342158B1 (de) 2000-06-13 2010-08-04 Richter, Thomas Pipeline ct-protokolle und -kommunikation
US7296073B1 (en) 2000-09-13 2007-11-13 Network Appliance, Inc. Mechanism to survive server failures when using the CIFS protocol
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7844796B2 (en) 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
WO2002103532A2 (de) 2001-06-20 2002-12-27 Pact Xpp Technologies Ag Verfahren zur bearbeitung von daten
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
DE10392560D2 (de) 2002-01-19 2005-05-12 Pact Xpp Technologies Ag Reconfigurierbarer Prozessor
WO2003071432A2 (de) 2002-02-18 2003-08-28 Pact Xpp Technologies Ag Bussysteme und rekonfigurationsverfahren
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
AU2003286131A1 (en) 2002-08-07 2004-03-19 Pact Xpp Technologies Ag Method and device for processing data
EP1537486A1 (de) 2002-09-06 2005-06-08 PACT XPP Technologies AG Rekonfigurierbare sequenzerstruktur
JP4700611B2 (ja) 2003-08-28 2011-06-15 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト データ処理装置およびデータ処理方法
JP4617847B2 (ja) * 2004-11-04 2011-01-26 株式会社日立製作所 情報処理システム及びアクセス方法
JP2009524134A (ja) 2006-01-18 2009-06-25 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト ハードウェア定義方法
US7693257B2 (en) 2006-06-29 2010-04-06 Accuray Incorporated Treatment delivery optimization

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501853A (ja) * 1973-05-11 1975-01-09
JPS54146941A (en) * 1978-05-08 1979-11-16 Ibm Shared device system
JPS55118121A (en) * 1979-03-02 1980-09-10 Hitachi Ltd Structure control system for computer system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE789512A (fr) * 1971-09-30 1973-03-29 Siemens Ag Procede et installation pour le traitement des erreurs dans un systeme de traitement de donnees compose d'unites separees
FR2250450A5 (ja) * 1973-09-10 1975-05-30 Honeywell Bull Soc Ind

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501853A (ja) * 1973-05-11 1975-01-09
JPS54146941A (en) * 1978-05-08 1979-11-16 Ibm Shared device system
JPS55118121A (en) * 1979-03-02 1980-09-10 Hitachi Ltd Structure control system for computer system

Also Published As

Publication number Publication date
EP0308056A3 (en) 1990-08-29
JPH0581942B2 (ja) 1993-11-16
DE3855673D1 (de) 1997-01-02
AU2002988A (en) 1989-03-02
EP0308056A2 (en) 1989-03-22
EP0308056B1 (en) 1996-11-20
AU604350B2 (en) 1990-12-13
CA1299757C (en) 1992-04-28
DE3855673T2 (de) 1997-05-07
BR8804289A (pt) 1989-03-21

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Legal Events

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