BR8804289A - Sistema de processamento de dados,processo para desativar seletivamente um dispositivo de um subsistema periferico,processo de operacao de um sistema de processamento de dados,subsistema periferico e processo para operar um subsistema periferico - Google Patents
Sistema de processamento de dados,processo para desativar seletivamente um dispositivo de um subsistema periferico,processo de operacao de um sistema de processamento de dados,subsistema periferico e processo para operar um subsistema perifericoInfo
- Publication number
- BR8804289A BR8804289A BR8804289A BR8804289A BR8804289A BR 8804289 A BR8804289 A BR 8804289A BR 8804289 A BR8804289 A BR 8804289A BR 8804289 A BR8804289 A BR 8804289A BR 8804289 A BR8804289 A BR 8804289A
- Authority
- BR
- Brazil
- Prior art keywords
- peripheral subsystem
- data processing
- processing system
- operate
- selectively disable
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/142—Reconfiguring to eliminate the error
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
- G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
- G06F11/201—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media between storage system components
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer And Data Communications (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US9072387A | 1987-08-28 | 1987-08-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
BR8804289A true BR8804289A (pt) | 1989-03-21 |
Family
ID=22224006
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR8804289A BR8804289A (pt) | 1987-08-28 | 1988-08-24 | Sistema de processamento de dados,processo para desativar seletivamente um dispositivo de um subsistema periferico,processo de operacao de um sistema de processamento de dados,subsistema periferico e processo para operar um subsistema periferico |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0308056B1 (pt) |
JP (1) | JPS6470855A (pt) |
AU (1) | AU604350B2 (pt) |
BR (1) | BR8804289A (pt) |
CA (1) | CA1299757C (pt) |
DE (1) | DE3855673T2 (pt) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5107496A (en) * | 1989-10-20 | 1992-04-21 | International Business Machines Corp. | Method and system for detecting and recovering from switching errors |
US6138126A (en) * | 1995-05-31 | 2000-10-24 | Network Appliance, Inc. | Method for allocating files in a file system integrated with a raid disk sub-system |
US5963962A (en) | 1995-05-31 | 1999-10-05 | Network Appliance, Inc. | Write anywhere file-system layout |
DE10240000A1 (de) * | 2002-08-27 | 2004-03-18 | Pact Xpp Technologies Ag | Busssysteme und Rekonfigurationsverfahren |
US7266725B2 (en) | 2001-09-03 | 2007-09-04 | Pact Xpp Technologies Ag | Method for debugging reconfigurable architectures |
DE19651075A1 (de) | 1996-12-09 | 1998-06-10 | Pact Inf Tech Gmbh | Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen |
DE19654595A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen |
JP3961028B2 (ja) | 1996-12-27 | 2007-08-15 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | データフロープロセッサ(dfp)の自動的なダイナミックアンロード方法並びに2次元または3次元のプログラミング可能なセルストラクチャを有するモジュール(fpga,dpga等) |
US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
US8686549B2 (en) | 2001-09-03 | 2014-04-01 | Martin Vorbach | Reconfigurable elements |
US6516351B2 (en) | 1997-12-05 | 2003-02-04 | Network Appliance, Inc. | Enforcing uniform file-locking for diverse file-locking protocols |
DE19861088A1 (de) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Verfahren zur Reparatur von integrierten Schaltkreisen |
US6457130B2 (en) | 1998-03-03 | 2002-09-24 | Network Appliance, Inc. | File access control in a multi-protocol file server |
US6279011B1 (en) | 1998-06-19 | 2001-08-21 | Network Appliance, Inc. | Backup and restore for heterogeneous file server environment |
US6574591B1 (en) | 1998-07-31 | 2003-06-03 | Network Appliance, Inc. | File systems image transfer between dissimilar file systems |
US6119244A (en) | 1998-08-25 | 2000-09-12 | Network Appliance, Inc. | Coordinating persistent status information with multiple file servers |
US6343984B1 (en) | 1998-11-30 | 2002-02-05 | Network Appliance, Inc. | Laminar flow duct cooling system |
WO2000034865A1 (de) * | 1998-12-04 | 2000-06-15 | Siemens Aktiengesellschaft | Verfahren zur überwachung auf verfügbarkeit einer systemfunktion in einem rechner-system |
US6457015B1 (en) | 1999-05-07 | 2002-09-24 | Network Appliance, Inc. | Adaptive and generalized status monitor |
WO2000077652A2 (de) | 1999-06-10 | 2000-12-21 | Pact Informationstechnologie Gmbh | Sequenz-partitionierung auf zellstrukturen |
US6467088B1 (en) * | 1999-06-30 | 2002-10-15 | Koninklijke Philips Electronics N.V. | Reconfiguration manager for controlling upgrades of electronic devices |
US6961749B1 (en) | 1999-08-25 | 2005-11-01 | Network Appliance, Inc. | Scalable file server with highly available pairs |
EP2226732A3 (de) | 2000-06-13 | 2016-04-06 | PACT XPP Technologies AG | Cachehierarchie für einen Multicore-Prozessor |
US7296073B1 (en) | 2000-09-13 | 2007-11-13 | Network Appliance, Inc. | Mechanism to survive server failures when using the CIFS protocol |
US8058899B2 (en) | 2000-10-06 | 2011-11-15 | Martin Vorbach | Logic cell array and bus system |
US7444531B2 (en) | 2001-03-05 | 2008-10-28 | Pact Xpp Technologies Ag | Methods and devices for treating and processing data |
US9037807B2 (en) | 2001-03-05 | 2015-05-19 | Pact Xpp Technologies Ag | Processor arrangement on a chip including data processing, memory, and interface elements |
US7844796B2 (en) | 2001-03-05 | 2010-11-30 | Martin Vorbach | Data processing device and method |
EP1402382B1 (de) | 2001-06-20 | 2010-08-18 | Richter, Thomas | Verfahren zur bearbeitung von daten |
US7996827B2 (en) | 2001-08-16 | 2011-08-09 | Martin Vorbach | Method for the translation of programs for reconfigurable architectures |
US7434191B2 (en) | 2001-09-03 | 2008-10-07 | Pact Xpp Technologies Ag | Router |
US8686475B2 (en) | 2001-09-19 | 2014-04-01 | Pact Xpp Technologies Ag | Reconfigurable elements |
DE10392560D2 (de) | 2002-01-19 | 2005-05-12 | Pact Xpp Technologies Ag | Reconfigurierbarer Prozessor |
DE10390689D2 (de) | 2002-02-18 | 2005-02-10 | Pact Xpp Technologies Ag | Bussysteme und Rekonfigurationsverfahren |
US8914590B2 (en) | 2002-08-07 | 2014-12-16 | Pact Xpp Technologies Ag | Data processing method and device |
US7657861B2 (en) | 2002-08-07 | 2010-02-02 | Pact Xpp Technologies Ag | Method and device for processing data |
WO2004021176A2 (de) | 2002-08-07 | 2004-03-11 | Pact Xpp Technologies Ag | Verfahren und vorrichtung zur datenverarbeitung |
AU2003289844A1 (en) | 2002-09-06 | 2004-05-13 | Pact Xpp Technologies Ag | Reconfigurable sequencer structure |
EP1676208A2 (en) | 2003-08-28 | 2006-07-05 | PACT XPP Technologies AG | Data processing device and method |
JP4617847B2 (ja) | 2004-11-04 | 2011-01-26 | 株式会社日立製作所 | 情報処理システム及びアクセス方法 |
US8250503B2 (en) | 2006-01-18 | 2012-08-21 | Martin Vorbach | Hardware definition method including determining whether to implement a function as hardware or software |
US7693257B2 (en) | 2006-06-29 | 2010-04-06 | Accuray Incorporated | Treatment delivery optimization |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
BE789512A (fr) * | 1971-09-30 | 1973-03-29 | Siemens Ag | Procede et installation pour le traitement des erreurs dans un systeme de traitement de donnees compose d'unites separees |
JPS5211248B2 (pt) * | 1973-05-11 | 1977-03-30 | ||
FR2250450A5 (pt) * | 1973-09-10 | 1975-05-30 | Honeywell Bull Soc Ind | |
US4207609A (en) * | 1978-05-08 | 1980-06-10 | International Business Machines Corporation | Method and means for path independent device reservation and reconnection in a multi-CPU and shared device access system |
JPS55118121A (en) * | 1979-03-02 | 1980-09-10 | Hitachi Ltd | Structure control system for computer system |
-
1988
- 1988-06-30 CA CA000570926A patent/CA1299757C/en not_active Expired - Fee Related
- 1988-07-26 AU AU20029/88A patent/AU604350B2/en not_active Ceased
- 1988-08-04 DE DE19883855673 patent/DE3855673T2/de not_active Expired - Fee Related
- 1988-08-04 EP EP19880307202 patent/EP0308056B1/en not_active Expired - Lifetime
- 1988-08-19 JP JP63204856A patent/JPS6470855A/ja active Granted
- 1988-08-24 BR BR8804289A patent/BR8804289A/pt unknown
Also Published As
Publication number | Publication date |
---|---|
JPH0581942B2 (pt) | 1993-11-16 |
EP0308056A2 (en) | 1989-03-22 |
AU2002988A (en) | 1989-03-02 |
AU604350B2 (en) | 1990-12-13 |
DE3855673D1 (de) | 1997-01-02 |
DE3855673T2 (de) | 1997-05-07 |
JPS6470855A (en) | 1989-03-16 |
EP0308056A3 (en) | 1990-08-29 |
CA1299757C (en) | 1992-04-28 |
EP0308056B1 (en) | 1996-11-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
KF | Request for proof of payment of annual fee | ||
FD5 | Application fees: dismissal - article 86 of industrial property law |