JPS6467963A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS6467963A
JPS6467963A JP62223915A JP22391587A JPS6467963A JP S6467963 A JPS6467963 A JP S6467963A JP 62223915 A JP62223915 A JP 62223915A JP 22391587 A JP22391587 A JP 22391587A JP S6467963 A JPS6467963 A JP S6467963A
Authority
JP
Japan
Prior art keywords
substrate
silicon layer
polycrystalline silicon
seed
dose
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62223915A
Other languages
Japanese (ja)
Inventor
Osamu Tsuchiya
Masakazu Sagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62223915A priority Critical patent/JPS6467963A/en
Publication of JPS6467963A publication Critical patent/JPS6467963A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the connection resistance of aluminum wirings to a substrate from increasing by forming a section for connecting metal wirings on the substrate of an amorphous silicon layer or a polycrystalline silicon layer thereby to eliminate that it becomes the seed of an epitaxial growth. CONSTITUTION:Si ions are implanted to the exposed surfaces of N<+> type source, drain 8 and P<+> type source, drain 10 from connecting holes 12 to form amorphous layers 14 or polycrystalline silicon layers 14. The energy of ion implantation may be approx. 10-100keV, and its dose may be 5X10<13>-5X10<14>atoms/cm<2>. Since a crystal structure on a substrate 1 may be broken, the energy and the dose are not required to be finely controlled,, and the amorphous silicon layer 14 or the polycrystalline silicon layer 14 may be formed by a simple method. Thus, the exposed surface from the hole 12 of the substrate 1 does not become the seed of growing an epitaxial layer.
JP62223915A 1987-09-09 1987-09-09 Semiconductor integrated circuit device Pending JPS6467963A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62223915A JPS6467963A (en) 1987-09-09 1987-09-09 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62223915A JPS6467963A (en) 1987-09-09 1987-09-09 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6467963A true JPS6467963A (en) 1989-03-14

Family

ID=16805706

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62223915A Pending JPS6467963A (en) 1987-09-09 1987-09-09 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6467963A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04264729A (en) * 1990-10-25 1992-09-21 Hyundai Electron Ind Co Ltd Flattening and formation method of metal thin film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04264729A (en) * 1990-10-25 1992-09-21 Hyundai Electron Ind Co Ltd Flattening and formation method of metal thin film

Similar Documents

Publication Publication Date Title
US5318915A (en) Method for forming a p-n junction in silicon carbide
WO1984002034A1 (en) Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates
JPS6433936A (en) Manufacture of semiconductor device
MY136344A (en) Low temperature formation of backside ohmic contacts for vertical devices
KR880006132A (en) Particle Manufacturing Method
TW269052B (en) Process for semiconductor wafer, semiconductor integrated circuit and devices thereof
JPS5638815A (en) Manufacture of semiconductor device
JPS5673697A (en) Manufacture of single crystal thin film
JPS6467963A (en) Semiconductor integrated circuit device
EP0259282A3 (en) A method for producing thin conductive and semi-conductive layers in monocrystal silicon
JPS57159013A (en) Manufacture of semiconductor thin film
JPS5645047A (en) Manufacture of semiconductor monocrystal film
TW364167B (en) A method relating to the manufacture of semiconductor devices
JPS6482620A (en) Manufacture of semiconductor device
JPS5648168A (en) Semiconductor integrated circuit unit and its preparation
JPS649615A (en) Manufacture of semiconductor device
JPS57159017A (en) Manufacture of semiconductor single crystal film
JPS6476760A (en) Manufacture of semiconductor device
JPS57196542A (en) Semiconductor integrated circuit device and manufacture thereof
JPS648644A (en) Manufacture of semiconductor device
KR970003805A (en) Semiconductor device manufacturing method
JPS57155775A (en) Semiconductor device
JPS6425555A (en) Trench forming method
EP0324819B1 (en) Improved ion-implanted gaas devices
JPS6455865A (en) Manufacture of semiconductor device