JPS6466744A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS6466744A
JPS6466744A JP62224663A JP22466387A JPS6466744A JP S6466744 A JPS6466744 A JP S6466744A JP 62224663 A JP62224663 A JP 62224663A JP 22466387 A JP22466387 A JP 22466387A JP S6466744 A JPS6466744 A JP S6466744A
Authority
JP
Japan
Prior art keywords
data
address
alu
code data
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62224663A
Other languages
Japanese (ja)
Inventor
Yukishige Maeda
Takashi Toyofuku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP62224663A priority Critical patent/JPS6466744A/en
Publication of JPS6466744A publication Critical patent/JPS6466744A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To improve the detecting rate of defects by outputting the code data on a user program stored in a memory in response to the address signal converted from an input signal of an address and then delivering the arithmetic result of said code data to a general-purpose terminal via a data bus. CONSTITUTION:In a test mode an address input signal 1-a is supplied to a program counter 15 from a general-purpose terminal 11 via an input/output device 12 and a data bus 13. Thus the signal 1-a is converted into an address signal 1-d and supplied to a memory 14 and the code data on a user program corresponding to the relevant address is read out in time division and sent to an ALU 16. Then the code data on plural user programs are calculated by the ALU 16 and the data 1-c on the arithmetic result of the ALU 16 is put on a bus 13. Then the data 1-c is outputted to the terminal 11 via the device 12.
JP62224663A 1987-09-07 1987-09-07 Semiconductor integrated circuit Pending JPS6466744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62224663A JPS6466744A (en) 1987-09-07 1987-09-07 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62224663A JPS6466744A (en) 1987-09-07 1987-09-07 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS6466744A true JPS6466744A (en) 1989-03-13

Family

ID=16817259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62224663A Pending JPS6466744A (en) 1987-09-07 1987-09-07 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS6466744A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166235A (en) * 1990-10-23 1992-11-24 Himont Incorporated Flame retardant concentrates and process for their preparation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166235A (en) * 1990-10-23 1992-11-24 Himont Incorporated Flame retardant concentrates and process for their preparation

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