JPS6464390A - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JPS6464390A JPS6464390A JP62222393A JP22239387A JPS6464390A JP S6464390 A JPS6464390 A JP S6464390A JP 62222393 A JP62222393 A JP 62222393A JP 22239387 A JP22239387 A JP 22239387A JP S6464390 A JPS6464390 A JP S6464390A
- Authority
- JP
- Japan
- Prior art keywords
- resin substrate
- face
- copper
- whose
- circuit pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 abstract 5
- 229920005989 resin Polymers 0.000 abstract 5
- 239000000758 substrate Substances 0.000 abstract 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 4
- 229910052802 copper Inorganic materials 0.000 abstract 3
- 239000010949 copper Substances 0.000 abstract 3
- 239000011889 copper foil Substances 0.000 abstract 2
- 239000002184 metal Substances 0.000 abstract 2
- 229910052751 metal Inorganic materials 0.000 abstract 2
- 150000001879 copper Chemical class 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000002245 particle Substances 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 238000011282 treatment Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Chemically Coating (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62222393A JPS6464390A (en) | 1987-09-04 | 1987-09-04 | Circuit board |
| KR1019880010943A KR910007059B1 (ko) | 1987-09-04 | 1988-08-27 | 회로기판 |
| US07/240,213 US4867839A (en) | 1987-09-04 | 1988-09-06 | Process for forming a circuit substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62222393A JPS6464390A (en) | 1987-09-04 | 1987-09-04 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6464390A true JPS6464390A (en) | 1989-03-10 |
Family
ID=16781664
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62222393A Pending JPS6464390A (en) | 1987-09-04 | 1987-09-04 | Circuit board |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS6464390A (ja) |
| KR (1) | KR910007059B1 (ja) |
-
1987
- 1987-09-04 JP JP62222393A patent/JPS6464390A/ja active Pending
-
1988
- 1988-08-27 KR KR1019880010943A patent/KR910007059B1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR910007059B1 (ko) | 1991-09-16 |
| KR890006114A (ko) | 1989-05-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3069753A (en) | Method of making a flat flexible cable termination | |
| ES8703710A1 (es) | Un metodo de formacion de una placa de circuito de multiplescapas | |
| GB1138939A (en) | Process for forming connecting pads on a circuit board | |
| EP0320601A3 (en) | Electroplating process | |
| EP0358332A3 (en) | Circuit board and method of soldering | |
| GB1266000A (ja) | ||
| IL141118A0 (en) | A method for the implementation of electronic components in via-holes of a multi-layer multi-chip module | |
| GB1268317A (en) | Improvements in or relating to the manufacture of conductor plates | |
| TW535480B (en) | Printed wiring board and method of producing the same | |
| JPS6411357A (en) | Method of taking out lead of semiconductor chip component | |
| JPS6464390A (en) | Circuit board | |
| CA2137823A1 (en) | Method of making a printed circuit board | |
| WO1991009511A3 (en) | Electrical conductors of conductive resin | |
| GB2017416A (en) | Circuit board manufacturing method | |
| JPS54100931A (en) | Electroless nickel plating | |
| JPS5724102A (en) | Microwave intergrated circuit | |
| JPS6451691A (en) | Manufacture of printed wiring board | |
| JPS6467995A (en) | Manufacture of printed circuit board with side face electrode | |
| ES2002169A6 (es) | Procedimiento para la fabricacion de soportes de circuitos electricos | |
| JPS6436494A (en) | Printed wiring board for ic card | |
| GB1042234A (en) | Multilayer printed circuits | |
| JPS6420696A (en) | Manufacture of film carrier board | |
| GB1145771A (en) | Electrical circuit boards | |
| GB1254281A (en) | Printed circuits | |
| JPS6484725A (en) | Pellet mounting method |