JPS6461828A - Register reference holding mechanism - Google Patents
Register reference holding mechanismInfo
- Publication number
- JPS6461828A JPS6461828A JP62219421A JP21942187A JPS6461828A JP S6461828 A JPS6461828 A JP S6461828A JP 62219421 A JP62219421 A JP 62219421A JP 21942187 A JP21942187 A JP 21942187A JP S6461828 A JPS6461828 A JP S6461828A
- Authority
- JP
- Japan
- Prior art keywords
- register
- signal
- instruction
- corresponding bit
- holding mechanism
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To know the reference state to all registers by using the strobe signal to set the corresponding bit or a register reference holding register. CONSTITUTION:When an instruction is evaluated, the contents of a holding register 105 are cleared by an instruction which activates a reset signal 107. Then a selection signal 102 serves as the number of a reference register in case a read or write request is given to a register in a register group 101 due to occurrence of an event like execution of an instruction, etc. A decoder 103 decodes the signal 102 and activates the strobe signal 104 to be applied to the reference register in the group 101. At the same time, a set signal 106 of the corresponding bit of the register 105 is also activated to set its corresponding bit. Thus it is possible to read out the register 105 by an exclusive instruction and to check the reference state of the register after occurrence of an event.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62219421A JPS6461828A (en) | 1987-09-01 | 1987-09-01 | Register reference holding mechanism |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62219421A JPS6461828A (en) | 1987-09-01 | 1987-09-01 | Register reference holding mechanism |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6461828A true JPS6461828A (en) | 1989-03-08 |
Family
ID=16735128
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62219421A Pending JPS6461828A (en) | 1987-09-01 | 1987-09-01 | Register reference holding mechanism |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6461828A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021149113A1 (en) * | 2020-01-20 | 2021-07-29 | 富士通株式会社 | Processor, simulator program, assembler program, and information processing program |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60108939A (en) * | 1983-11-17 | 1985-06-14 | Mitsubishi Electric Corp | Display device of memory using state |
JPS62187943A (en) * | 1985-11-21 | 1987-08-17 | Nec Corp | Data monitoring device |
-
1987
- 1987-09-01 JP JP62219421A patent/JPS6461828A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60108939A (en) * | 1983-11-17 | 1985-06-14 | Mitsubishi Electric Corp | Display device of memory using state |
JPS62187943A (en) * | 1985-11-21 | 1987-08-17 | Nec Corp | Data monitoring device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021149113A1 (en) * | 2020-01-20 | 2021-07-29 | 富士通株式会社 | Processor, simulator program, assembler program, and information processing program |
JPWO2021149113A1 (en) * | 2020-01-20 | 2021-07-29 |
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