JPS6446114A - Power supply sequence circuit - Google Patents

Power supply sequence circuit

Info

Publication number
JPS6446114A
JPS6446114A JP20180887A JP20180887A JPS6446114A JP S6446114 A JPS6446114 A JP S6446114A JP 20180887 A JP20180887 A JP 20180887A JP 20180887 A JP20180887 A JP 20180887A JP S6446114 A JPS6446114 A JP S6446114A
Authority
JP
Japan
Prior art keywords
power supply
terminal
output
delivered
regulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20180887A
Other languages
Japanese (ja)
Inventor
Shinichi Hayashi
Katsunori Shimohara
Masakazu Nishino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP20180887A priority Critical patent/JPS6446114A/en
Publication of JPS6446114A publication Critical patent/JPS6446114A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To surely control the power supply application sequence and to improve the power supply reliability with small power consumption, by using 1st and 2nd conduction path means using the optical coupling elements, a delay means, a control means for output power supply, etc. CONSTITUTION:When a negative power supply VIN2 is applied to an input power supply terminal 32, the output of a 3-terminal regulator 50 is kept at an earth level and therefore a light emitting diode 62 emits no light. Then an optically connected phototransistor Tr64 does not conduct and therefore an output power supply VEE is not delivered to an output terminal 38. When a positive power supply VIN1 is applied to an input terminal 30, the prescribed voltage VCC is delivered from an output terminal 36 via a regulator 50. The voltage VCC is also supplied to a delay circuit 12 and a voltage detecting circuit 14. Thus the diode 62 emits the light and the Tr64 conducts. Then the voltage VIN2 supplied to the terminal 32 is converted into the prescribed voltage VEE via a 3-terminal regulator 68 and delivered via the terminal 38. Thus it is possible to surely control the power supply application sequence and to improve the power supply reliability with small power consumption.
JP20180887A 1987-08-14 1987-08-14 Power supply sequence circuit Pending JPS6446114A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20180887A JPS6446114A (en) 1987-08-14 1987-08-14 Power supply sequence circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20180887A JPS6446114A (en) 1987-08-14 1987-08-14 Power supply sequence circuit

Publications (1)

Publication Number Publication Date
JPS6446114A true JPS6446114A (en) 1989-02-20

Family

ID=16447260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20180887A Pending JPS6446114A (en) 1987-08-14 1987-08-14 Power supply sequence circuit

Country Status (1)

Country Link
JP (1) JPS6446114A (en)

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