JPS6445179A - Memory cell - Google Patents
Memory cellInfo
- Publication number
- JPS6445179A JPS6445179A JP62201731A JP20173187A JPS6445179A JP S6445179 A JPS6445179 A JP S6445179A JP 62201731 A JP62201731 A JP 62201731A JP 20173187 A JP20173187 A JP 20173187A JP S6445179 A JPS6445179 A JP S6445179A
- Authority
- JP
- Japan
- Prior art keywords
- closed circuit
- state
- elements
- superconductive
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To contrive an increase in the degree of integration of a closed circuit by a method wherein a memory cell is provided with an inductance using a superconductive material, three-terminal type superconducting switching elements and the closed circuit constituted of a superconductive wiring material. CONSTITUTION:Three-terminal type superconducting switching elements 2, superconducting coils 1 and a closed circuit constituted of a superconductive material are used for a memory cell. That is, the elements 2 are turned-ON and a state that a circulating current is made to flow in the closed circuit brought into a superconductive state is assumed to be a storage state of 1 and a state that the current is not made to flow is assumed to be a storage state of 0. Accordingly, so long as an action is not given to the closed circuit from the exterior, this state is sustained semipermanently. Therefore, information is stored statically. Moreover, by controlling the circulating current by a minority of pieces of the elements 2 in the closed circuit, a writing and a readout can be performed. Thereby, the totaled occupation area of all the elements including the coils 1 can be reduced and the improvement of the integration degree of the closed circuit can be contrived.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62201731A JPS6445179A (en) | 1987-08-14 | 1987-08-14 | Memory cell |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62201731A JPS6445179A (en) | 1987-08-14 | 1987-08-14 | Memory cell |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6445179A true JPS6445179A (en) | 1989-02-17 |
Family
ID=16445999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62201731A Pending JPS6445179A (en) | 1987-08-14 | 1987-08-14 | Memory cell |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6445179A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5388068A (en) * | 1990-05-02 | 1995-02-07 | Microelectronics & Computer Technology Corp. | Superconductor-semiconductor hybrid memory circuits with superconducting three-terminal switching devices |
-
1987
- 1987-08-14 JP JP62201731A patent/JPS6445179A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5388068A (en) * | 1990-05-02 | 1995-02-07 | Microelectronics & Computer Technology Corp. | Superconductor-semiconductor hybrid memory circuits with superconducting three-terminal switching devices |
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